From: Thierry Reding Date: Thu, 10 Sep 2015 13:55:21 +0000 (+0200) Subject: clk: tegra: dfll: Properly protect OPP list X-Git-Tag: v4.3-rc2~4^2~2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e1595d89ae8180e0d3815cc75336ac3484de0aa0;p=platform%2Fkernel%2Flinux-exynos.git clk: tegra: dfll: Properly protect OPP list The OPP list needs to be protected against concurrent accesses. Using simple RCU read locks does the trick and gets rid of the following lockdep warning: =============================== [ INFO: suspicious RCU usage. ] 4.2.0-next-20150908 #1 Not tainted ------------------------------- drivers/base/power/opp.c:460 Missing rcu_read_lock() or dev_opp_list_lock protection! other info that might help us debug this: rcu_scheduler_active = 1, debug_locks = 0 4 locks held by kworker/u8:0/6: #0: ("%s""deferwq"){++++.+}, at: [] process_one_work+0x118/0x4bc #1: (deferred_probe_work){+.+.+.}, at: [] process_one_work+0x118/0x4bc #2: (&dev->mutex){......}, at: [] __device_attach+0x20/0x118 #3: (prepare_lock){+.+...}, at: [] clk_prepare_lock+0x10/0xf8 stack backtrace: CPU: 2 PID: 6 Comm: kworker/u8:0 Not tainted 4.2.0-next-20150908 #1 Hardware name: NVIDIA Tegra SoC (Flattened Device Tree) Workqueue: deferwq deferred_probe_work_func [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [] (show_stack) from [] (dump_stack+0x94/0xd4) [] (dump_stack) from [] (dev_pm_opp_find_freq_ceil+0x108/0x114) [] (dev_pm_opp_find_freq_ceil) from [] (dfll_calculate_rate_request+0xb8/0x170) [] (dfll_calculate_rate_request) from [] (dfll_clk_round_rate+0x1c/0x2c) [] (dfll_clk_round_rate) from [] (clk_calc_new_rates+0x1b8/0x228) [] (clk_calc_new_rates) from [] (clk_core_set_rate_nolock+0x44/0xac) [] (clk_core_set_rate_nolock) from [] (clk_set_rate+0x24/0x34) [] (clk_set_rate) from [] (tegra124_cpufreq_probe+0x120/0x230) [] (tegra124_cpufreq_probe) from [] (platform_drv_probe+0x44/0xac) [] (platform_drv_probe) from [] (driver_probe_device+0x218/0x304) [] (driver_probe_device) from [] (bus_for_each_drv+0x60/0x94) [] (bus_for_each_drv) from [] (__device_attach+0xb4/0x118) ata1: SATA link down (SStatus 0 SControl 300) [] (__device_attach) from [] (bus_probe_device+0x88/0x90) [] (bus_probe_device) from [] (deferred_probe_work_func+0x58/0x8c) [] (deferred_probe_work_func) from [] (process_one_work+0x188/0x4bc) [] (process_one_work) from [] (worker_thread+0x4c/0x4f4) [] (worker_thread) from [] (kthread+0xe4/0xf8) [] (kthread) from [] (ret_from_fork+0x14/0x24) Signed-off-by: Thierry Reding Fixes: c4fe70ada40f ("clk: tegra: Add closed loop support for the DFLL") [vince.h@nvidia.com: Unlock rcu on error path] Signed-off-by: Vince Hsu [sboyd@codeaurora.org: Dropped second hunk that nested the rcu read lock unnecessarily] Signed-off-by: Stephen Boyd --- diff --git a/drivers/clk/tegra/clk-dfll.c b/drivers/clk/tegra/clk-dfll.c index c2ff859..c4e3a52 100644 --- a/drivers/clk/tegra/clk-dfll.c +++ b/drivers/clk/tegra/clk-dfll.c @@ -682,11 +682,17 @@ static int find_lut_index_for_rate(struct tegra_dfll *td, unsigned long rate) struct dev_pm_opp *opp; int i, uv; + rcu_read_lock(); + opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate); - if (IS_ERR(opp)) + if (IS_ERR(opp)) { + rcu_read_unlock(); return PTR_ERR(opp); + } uv = dev_pm_opp_get_voltage(opp); + rcu_read_unlock(); + for (i = 0; i < td->i2c_lut_size; i++) { if (regulator_list_voltage(td->vdd_reg, td->i2c_lut[i]) == uv) return i;