From: Ville Syrjälä Date: Fri, 4 Oct 2013 17:32:25 +0000 (+0300) Subject: drm/i915: Fix VGA_DISP_DISABLE check X-Git-Tag: upstream/snapshot3+hdmi~3525^2~90^2~235 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e1553faa904f3f8bdd734ee1404ce39c652bc9c6;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git drm/i915: Fix VGA_DISP_DISABLE check The VGACNTRL register contains a bunch of other stuff besides the VGA_DISP_DISABLE bit. When we write the register we always set those other bits to zero, so normally the current check would work. However on HSW disabling and re-enabling the power well will reset the VGACNTRL register to its default value, which has several of the other bits set as well. So only look at the VGA_DISP_DISABLE bit when checking whether the VGA plane needs re-disabling. Signed-off-by: Ville Syrjälä Reviewed-by: Jesse Barnes Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 183eb82e..a003bc5 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -10663,7 +10663,7 @@ void i915_redisable_vga(struct drm_device *dev) (I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_STATE_ENABLED) == 0) return; - if (I915_READ(vga_reg) != VGA_DISP_DISABLE) { + if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) { DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n"); i915_disable_vga(dev); i915_disable_vga_mem(dev);