From: Gerhard Sittig Date: Sat, 30 Nov 2013 22:51:29 +0000 (+0100) Subject: serial: mpc512x: adjust for OF based clock lookup X-Git-Tag: upstream/snapshot3+hdmi~3517^2~16^2~12 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e149b42b8605f4e0e86662fe880716ccdfdb4ef9;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git serial: mpc512x: adjust for OF based clock lookup after device tree based clock lookup became available, the peripheral driver need no longer construct clock names which include the PSC index, remove the "psc%d_mclk" template and unconditionally use 'mclk' acquire and release the "ipg" clock item for register access as well Cc: Greg Kroah-Hartman Cc: Jiri Slaby Cc: linux-serial@vger.kernel.org Acked-by: Greg Kroah-Hartman Signed-off-by: Gerhard Sittig Signed-off-by: Anatolij Gustschin --- diff --git a/drivers/tty/serial/mpc52xx_uart.c b/drivers/tty/serial/mpc52xx_uart.c index ec06505..6345f37 100644 --- a/drivers/tty/serial/mpc52xx_uart.c +++ b/drivers/tty/serial/mpc52xx_uart.c @@ -619,29 +619,55 @@ static irqreturn_t mpc512x_psc_handle_irq(struct uart_port *port) } static struct clk *psc_mclk_clk[MPC52xx_PSC_MAXNUM]; +static struct clk *psc_ipg_clk[MPC52xx_PSC_MAXNUM]; /* called from within the .request_port() callback (allocation) */ static int mpc512x_psc_alloc_clock(struct uart_port *port) { int psc_num; - char clk_name[16]; struct clk *clk; int err; psc_num = (port->mapbase & 0xf00) >> 8; - snprintf(clk_name, sizeof(clk_name), "psc%d_mclk", psc_num); - clk = devm_clk_get(port->dev, clk_name); + + clk = devm_clk_get(port->dev, "mclk"); if (IS_ERR(clk)) { dev_err(port->dev, "Failed to get MCLK!\n"); - return PTR_ERR(clk); + err = PTR_ERR(clk); + goto out_err; } err = clk_prepare_enable(clk); if (err) { dev_err(port->dev, "Failed to enable MCLK!\n"); - return err; + goto out_err; } psc_mclk_clk[psc_num] = clk; + + clk = devm_clk_get(port->dev, "ipg"); + if (IS_ERR(clk)) { + dev_err(port->dev, "Failed to get IPG clock!\n"); + err = PTR_ERR(clk); + goto out_err; + } + err = clk_prepare_enable(clk); + if (err) { + dev_err(port->dev, "Failed to enable IPG clock!\n"); + goto out_err; + } + psc_ipg_clk[psc_num] = clk; + return 0; + +out_err: + if (psc_mclk_clk[psc_num]) { + clk_disable_unprepare(psc_mclk_clk[psc_num]); + psc_mclk_clk[psc_num] = NULL; + } + if (psc_ipg_clk[psc_num]) { + clk_disable_unprepare(psc_ipg_clk[psc_num]); + psc_ipg_clk[psc_num] = NULL; + } + return err; } /* called from within the .release_port() callback (release) */ @@ -656,6 +682,10 @@ static void mpc512x_psc_relse_clock(struct uart_port *port) clk_disable_unprepare(clk); psc_mclk_clk[psc_num] = NULL; } + if (psc_ipg_clk[psc_num]) { + clk_disable_unprepare(psc_ipg_clk[psc_num]); + psc_ipg_clk[psc_num] = NULL; + } } /* implementation of the .clock() callback (enable/disable) */