From: Petar Jovanovic Date: Tue, 12 May 2015 17:14:05 +0000 (+0000) Subject: [Mips] Return false for isFPCloseToIncomingSP() X-Git-Tag: llvmorg-3.7.0-rc1~4788 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e0de8f4efbbf821644093e95e3a3a04e4d8e09fa;p=platform%2Fupstream%2Fllvm.git [Mips] Return false for isFPCloseToIncomingSP() On Mips, frame pointer points to the same side of the frame as the stack pointer. This function is used to decide where to put register scavenging spill slot. So far, it was put on the wrong side of the frame, and thus it was too far away from $fp when frame was larger than 2^15 bytes. Patch by Vladimir Radosavljevic. http://reviews.llvm.org/D8895 llvm-svn: 237153 --- diff --git a/llvm/lib/Target/Mips/MipsFrameLowering.h b/llvm/lib/Target/Mips/MipsFrameLowering.h index 96d1e29..0b51830 100644 --- a/llvm/lib/Target/Mips/MipsFrameLowering.h +++ b/llvm/lib/Target/Mips/MipsFrameLowering.h @@ -32,6 +32,8 @@ public: bool hasFP(const MachineFunction &MF) const override; + bool isFPCloseToIncomingSP() const override { return false; } + void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, diff --git a/llvm/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll b/llvm/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll new file mode 100644 index 0000000..3dc1cde7 --- /dev/null +++ b/llvm/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll @@ -0,0 +1,32 @@ +; Check that register scavenging spill slot is close to $fp. +; RUN: llc -march=mipsel -O0 < %s | FileCheck %s + +; CHECK: sw ${{.*}}, 4($fp) +; CHECK: lw ${{.*}}, 4($fp) + +define i32 @main(i32 signext %argc, i8** %argv) "no-frame-pointer-elim"="true" { +entry: + %retval = alloca i32, align 4 + %argc.addr = alloca i32, align 4 + %argv.addr = alloca i8**, align 4 + %v0 = alloca <16 x i8>, align 16 + %.compoundliteral = alloca <16 x i8>, align 16 + %v1 = alloca <16 x i8>, align 16 + %.compoundliteral1 = alloca <16 x i8>, align 16 + %unused_variable = alloca [16384 x i32], align 4 + %result = alloca <16 x i8>, align 16 + store i32 0, i32* %retval + store i32 %argc, i32* %argc.addr, align 4 + store i8** %argv, i8*** %argv.addr, align 4 + store <16 x i8> , <16 x i8>* %.compoundliteral + %0 = load <16 x i8>, <16 x i8>* %.compoundliteral + store <16 x i8> %0, <16 x i8>* %v0, align 16 + store <16 x i8> zeroinitializer, <16 x i8>* %.compoundliteral1 + %1 = load <16 x i8>, <16 x i8>* %.compoundliteral1 + store <16 x i8> %1, <16 x i8>* %v1, align 16 + %2 = load <16 x i8>, <16 x i8>* %v0, align 16 + %3 = load <16 x i8>, <16 x i8>* %v1, align 16 + %mul = mul <16 x i8> %2, %3 + store <16 x i8> %mul, <16 x i8>* %result, align 16 + ret i32 0 +}