From: Marc Zyngier <maz@kernel.org>
Date: Sat, 17 Jun 2023 06:17:53 +0000 (+0100)
Subject: Merge branch irq/loongarch-fixes-6.5 into irq/irqchip-next
X-Git-Tag: v6.6.7~2142^2~1^2~5
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e0b78e9fa34102ce82ef03c71eb13f0b79954ba3;p=platform%2Fkernel%2Flinux-starfive.git

Merge branch irq/loongarch-fixes-6.5 into irq/irqchip-next

* irq/loongarch-fixes-6.5:
  : .
  : Yet another series of random fixes for the Loongson/Loongarch
  : string of interrupt controller, covering
  :
  : - affinity setting,
  : - trigger polarity,
  : - wake-up,
  : - DT support
  : .
  irqchip/loongson-eiointc: Add DT init support
  dt-bindings: interrupt-controller: Add Loongson EIOINTC
  irqchip/loongson-eiointc: Fix irq affinity setting during resume
  irqchip/loongson-liointc: Add IRQCHIP_SKIP_SET_WAKE flag
  irqchip/loongson-liointc: Fix IRQ trigger polarity
  irqchip/loongson-pch-pic: Fix potential incorrect hwirq assignment
  irqchip/loongson-pch-pic: Fix initialization of HT vector register

Signed-off-by: Marc Zyngier <maz@kernel.org>
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