From: xingyu.wu <xingyu.wu@starfivetech.com>
Date: Tue, 12 Jul 2022 03:00:52 +0000 (+0800)
Subject: dtsi:Add reset nodes about timer
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e07ee4b327d261fd1f3013bb8392076c233d1311;p=platform%2Fkernel%2Flinux-starfive.git

dtsi:Add reset nodes about timer

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
---

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index c119732..a0e1134 100755
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -419,6 +419,13 @@
 				 <&clkgen JH7110_TIMER_CLK_APB>;
 			clock-names = "timer0", "timer1",
 				      "timer2", "timer3", "apb_clk";
+			resets = <&rstgen RSTN_U0_TIMER_TIMER0>,
+				 <&rstgen RSTN_U0_TIMER_TIMER1>,
+				 <&rstgen RSTN_U0_TIMER_TIMER2>,
+				 <&rstgen RSTN_U0_TIMER_TIMER3>,
+				 <&rstgen RSTN_U0_TIMER_APB>;
+			reset-names = "timer0", "timer1",
+				      "timer2", "timer3", "apb_rst";
 			clock-frequency = <24000000>;
 			status = "okay";
 		};