From: Zhigang Gong <zhigang.gong@intel.com>
Date: Wed, 15 Jan 2014 07:26:07 +0000 (+0800)
Subject: GBE: fixed a register liveness bug for getsamplerinfo instrution.
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=e01556dd9532a90dcd49d1237e99b5099a1305e9;p=contrib%2Fbeignet.git

GBE: fixed a register liveness bug for getsamplerinfo instrution.

The previous implementation insert the ocl::samplerinfo to the
instruction after the liveness calculation stage, so the liveness
information is not correct for that register and may cause some
test cases fails. Now fix it.

Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
Reviewed-by: "Yang, Rong R" <rong.r.yang@intel.com>
---

diff --git a/backend/src/backend/context.cpp b/backend/src/backend/context.cpp
index d389d01..2543cae 100644
--- a/backend/src/backend/context.cpp
+++ b/backend/src/backend/context.cpp
@@ -489,8 +489,9 @@ namespace gbe
           continue;
         } else if (insn.getOpcode() == ir::OP_GET_SAMPLER_INFO) {
           /* change the src to sampler information register. */
-          if (curbeRegs.find(ir::ocl::samplerinfo) == curbeRegs.end())
-            insertCurbeReg(ir::ocl::samplerinfo, this->newCurbeEntry(GBE_CURBE_SAMPLER_INFO, 0, 32));
+          GBE_ASSERT(insn.getSrc(1) == ir::ocl::samplerinfo);
+          if (curbeRegs.find(insn.getSrc(1)) == curbeRegs.end())
+            insertCurbeReg(insn.getSrc(1), this->newCurbeEntry(GBE_CURBE_SAMPLER_INFO, 0, 32));
           continue;
         }
         if (fn.isSpecialReg(reg) == false) continue;
diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
index 445fd6d..1769f17 100644
--- a/backend/src/backend/gen_insn_selection.cpp
+++ b/backend/src/backend/gen_insn_selection.cpp
@@ -3017,7 +3017,7 @@ namespace gbe
       using namespace ir;
       GenRegister dst, src;
       dst = sel.selReg(insn.getDst(0), TYPE_U16);
-      src = GenRegister::offset(GenRegister::uw1grf(ocl::samplerinfo), 0, sel.ctx.getFunction().getSamplerSet()->getIdx(insn.getSrc(0)) * 2);
+      src = GenRegister::offset(GenRegister::uw1grf(insn.getSrc(1)), 0, sel.ctx.getFunction().getSamplerSet()->getIdx(insn.getSrc(0)) * 2);
       src.subphysical = 1;
       sel.MOV(dst, src);
       return true;
diff --git a/backend/src/ir/instruction.cpp b/backend/src/ir/instruction.cpp
index c0cf88a..b898820 100644
--- a/backend/src/ir/instruction.cpp
+++ b/backend/src/ir/instruction.cpp
@@ -565,26 +565,28 @@ namespace ir {
 
     class ALIGNED_INSTRUCTION GetSamplerInfoInstruction :
       public BasePolicy,
-      public NSrcPolicy<GetSamplerInfoInstruction, 1>,
+      public NSrcPolicy<GetSamplerInfoInstruction, 2>,
       public NDstPolicy<GetSamplerInfoInstruction, 1>
     {
     public:
       GetSamplerInfoInstruction( Register dst,
-                                 Register src)
+                                 Register src,
+                                 Register samplerInfo)
       {
         this->opcode = OP_GET_SAMPLER_INFO;
         this->dst[0] = dst;
         this->src[0] = src;
+        this->src[1] = samplerInfo;
       }
 
       INLINE bool wellFormed(const Function &fn, std::string &why) const;
       INLINE void out(std::ostream &out, const Function &fn) const {
         this->outOpcode(out);
-        out << " sampler id %" << this->getSrc(fn, 0)
-            << " %" << this->getDst(fn, 0);
+        out  << " %" << this->getDst(fn, 0)
+             << " sampler id %" << this->getSrc(fn, 0);
       }
 
-      Register src[1];                  //!< Surface to get info
+      Register src[2];                  //!< Surface to get info
       Register dst[1];                  //!< return value
       static const uint32_t dstNum = 1;
     };
@@ -612,8 +614,9 @@ namespace ir {
       INLINE void out(std::ostream &out, const Function &fn) const {
         this->outOpcode(out);
         out << "." << this->getInfoType()
+            << " %" << this->getDst(fn, 0)
             << " surface id %" << this->getSrc(fn, 0)
-            << " %" << this->getDst(fn, 0);
+            << " info reg %" << this->getSrc(fn, 1);
       }
 
       uint8_t infoType;                 //!< Type of the requested information.
@@ -1644,8 +1647,8 @@ DECL_MEM_FN(GetImageInfoInstruction, uint32_t, getInfoType(void), getInfoType())
     return internal::GetImageInfoInstruction(infoType, dst, src, infoReg).convert();
   }
 
-  Instruction GET_SAMPLER_INFO(Register dst, Register src) {
-    return internal::GetSamplerInfoInstruction(dst, src).convert();
+  Instruction GET_SAMPLER_INFO(Register dst, Register src, Register samplerInfo) {
+    return internal::GetSamplerInfoInstruction(dst, src, samplerInfo).convert();
   }
 
   std::ostream &operator<< (std::ostream &out, const Instruction &insn) {
diff --git a/backend/src/ir/instruction.hpp b/backend/src/ir/instruction.hpp
index 46577c7..a3255b1 100644
--- a/backend/src/ir/instruction.hpp
+++ b/backend/src/ir/instruction.hpp
@@ -669,7 +669,7 @@ namespace ir {
   /*! get image information , such as width/height/depth/... */
   Instruction GET_IMAGE_INFO(int infoType, Register dst, Register src, Register infoReg);
   /*! get sampler information  */
-  Instruction GET_SAMPLER_INFO(Register dst, Register src);
+  Instruction GET_SAMPLER_INFO(Register dst, Register src, Register samplerInfo);
   /*! label labelIndex */
   Instruction LABEL(LabelIndex labelIndex);
 
diff --git a/backend/src/llvm/llvm_gen_backend.cpp b/backend/src/llvm/llvm_gen_backend.cpp
index f178585..002a161 100644
--- a/backend/src/llvm/llvm_gen_backend.cpp
+++ b/backend/src/llvm/llvm_gen_backend.cpp
@@ -2370,7 +2370,7 @@ namespace gbe
             GBE_ASSERT(AI != AE);
             const ir::Register sampler = this->appendSampler(AI); ++AI;
             const ir::Register reg = this->getRegister(&I, 0);
-            ctx.GET_SAMPLER_INFO(reg, sampler);
+            ctx.GET_SAMPLER_INFO(reg, sampler, ir::ocl::samplerinfo);
             break;
           }
           case GEN_OCL_READ_IMAGE0: