From: Stefan Pintilie <stefanp@ca.ibm.com>
Date: Wed, 17 May 2023 14:36:23 +0000 (-0400)
Subject: [PowerPC] Add DFP multiply and divide instructions.
X-Git-Tag: upstream/17.0.6~8009
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=df367da5a68363df2f2dd55c26a9655c13da4715;p=platform%2Fupstream%2Fllvm.git

[PowerPC] Add DFP multiply and divide instructions.

This patch adds the DFP mul and div instructions. This includes both the
double and quad forms of the instructions as well as the record form.

Reviewed By: amyk

Differential Revision: https://reviews.llvm.org/D150787
---

diff --git a/llvm/lib/Target/PowerPC/PPCInstrDFP.td b/llvm/lib/Target/PowerPC/PPCInstrDFP.td
index be13ed9..56847b4 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrDFP.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrDFP.td
@@ -24,5 +24,17 @@ defm DSUB : XForm_28r<59, 514, (outs f8rc:$RST), (ins f8rc:$RA, f8rc:$RB),
 
 defm DSUBQ : XForm_28r<63, 514, (outs fpairrc:$RST), (ins fpairrc:$RA, fpairrc:$RB),
                        "dsubq",  "$RST, $RA, $RB", IIC_FPGeneral, []>;
+
+defm DMUL : XForm_28r<59, 34, (outs f8rc:$RST), (ins f8rc:$RA, f8rc:$RB),
+                      "dmul",  "$RST, $RA, $RB", IIC_FPGeneral, []>;
+
+defm DMULQ : XForm_28r<63, 34, (outs fpairrc:$RST), (ins fpairrc:$RA, fpairrc:$RB),
+                       "dmulq",  "$RST, $RA, $RB", IIC_FPGeneral, []>;
+
+defm DDIV : XForm_28r<59, 546, (outs f8rc:$RST), (ins f8rc:$RA, f8rc:$RB),
+                      "ddiv",  "$RST, $RA, $RB", IIC_FPGeneral, []>;
+
+defm DDIVQ : XForm_28r<63, 546, (outs fpairrc:$RST), (ins fpairrc:$RA, fpairrc:$RB),
+                       "ddivq",  "$RST, $RA, $RB", IIC_FPGeneral, []>;
 }
 
diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-dfp.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-dfp.txt
index 3b7fa5f..126aad4 100644
--- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-dfp.txt
+++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-dfp.txt
@@ -23,3 +23,27 @@
 
 # CHECK: dsubq. 2, 6, 4
 0xfc 0x46 0x24 0x05
+
+# CHECK: dmul 2, 3, 4
+0xec 0x43 0x20 0x44
+
+# CHECK: dmul. 2, 3, 4
+0xec 0x43 0x20 0x45
+
+# CHECK: dmulq 2, 6, 4
+0xfc 0x46 0x20 0x44
+
+# CHECK: dmulq. 2, 6, 4
+0xfc 0x46 0x20 0x45
+
+# CHECK: ddiv 2, 3, 4
+0xec 0x43 0x24 0x44
+
+# CHECK: ddiv. 2, 3, 4
+0xec 0x43 0x24 0x45
+
+# CHECK: ddivq 2, 6, 4
+0xfc 0x46 0x24 0x44
+
+# CHECK: ddivq. 2, 6, 4
+0xfc 0x46 0x24 0x45
diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-dfp.s b/llvm/test/MC/PowerPC/ppc64-encoding-dfp.s
index 4b76bd2..256ca98 100644
--- a/llvm/test/MC/PowerPC/ppc64-encoding-dfp.s
+++ b/llvm/test/MC/PowerPC/ppc64-encoding-dfp.s
@@ -26,3 +26,27 @@
 # CHECK-BE: dsubq. 2, 6, 4                 # encoding: [0xfc,0x46,0x24,0x05]
 # CHECK-LE: dsubq. 2, 6, 4                 # encoding: [0x05,0x24,0x46,0xfc]
             dsubq. 2, 6, 4
+# CHECK-BE: dmul 2, 3, 4                   # encoding: [0xec,0x43,0x20,0x44]
+# CHECK-LE: dmul 2, 3, 4                   # encoding: [0x44,0x20,0x43,0xec]
+            dmul 2, 3, 4
+# CHECK-BE: dmul. 2, 3, 4                  # encoding: [0xec,0x43,0x20,0x45]
+# CHECK-LE: dmul. 2, 3, 4                  # encoding: [0x45,0x20,0x43,0xec]
+            dmul. 2, 3, 4
+# CHECK-BE: dmulq 2, 6, 4                  # encoding: [0xfc,0x46,0x20,0x44]
+# CHECK-LE: dmulq 2, 6, 4                  # encoding: [0x44,0x20,0x46,0xfc]
+            dmulq 2, 6, 4
+# CHECK-BE: dmulq. 2, 6, 4                 # encoding: [0xfc,0x46,0x20,0x45]
+# CHECK-LE: dmulq. 2, 6, 4                 # encoding: [0x45,0x20,0x46,0xfc]
+            dmulq. 2, 6, 4
+# CHECK-BE: ddiv 2, 3, 4                   # encoding: [0xec,0x43,0x24,0x44]
+# CHECK-LE: ddiv 2, 3, 4                   # encoding: [0x44,0x24,0x43,0xec]
+            ddiv 2, 3, 4
+# CHECK-BE: ddiv. 2, 3, 4                  # encoding: [0xec,0x43,0x24,0x45]
+# CHECK-LE: ddiv. 2, 3, 4                  # encoding: [0x45,0x24,0x43,0xec]
+            ddiv. 2, 3, 4
+# CHECK-BE: ddivq 2, 6, 4                  # encoding: [0xfc,0x46,0x24,0x44]
+# CHECK-LE: ddivq 2, 6, 4                  # encoding: [0x44,0x24,0x46,0xfc]
+            ddivq 2, 6, 4
+# CHECK-BE: ddivq. 2, 6, 4                 # encoding: [0xfc,0x46,0x24,0x45]
+# CHECK-LE: ddivq. 2, 6, 4                 # encoding: [0x45,0x24,0x46,0xfc]
+            ddivq. 2, 6, 4