From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Mon, 15 Nov 2010 05:25:58 +0000 (+0000)
Subject: drm/i915: Fix current tiling check for relaxed fencing
X-Git-Tag: v2.6.38-rc1~419^2~23^2~105
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=df15315899c0641412bd54b29565a70b078a6ac8;p=platform%2Fkernel%2Flinux-stable.git

drm/i915: Fix current tiling check for relaxed fencing

As we may bind an object with the correct alignment, but with an invalid
size, it may pass the current checks on whether the object may be reused
with a fence.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---

diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 0597a73..a517b48 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -245,6 +245,17 @@ i915_gem_object_fence_ok(struct drm_gem_object *obj, int tiling_mode)
 	if (INTEL_INFO(obj->dev)->gen >= 4)
 		return true;
 
+	if (!obj_priv->gtt_space)
+		return true;
+
+	if (INTEL_INFO(obj->dev)->gen == 3) {
+		if (obj_priv->gtt_offset & ~I915_FENCE_START_MASK)
+			return false;
+	} else {
+		if (obj_priv->gtt_offset & ~I830_FENCE_START_MASK)
+			return false;
+	}
+
 	/*
 	 * Previous chips need to be aligned to the size of the smallest
 	 * fence register that can contain the object.
@@ -257,16 +268,11 @@ i915_gem_object_fence_ok(struct drm_gem_object *obj, int tiling_mode)
 	while (size < obj_priv->base.size)
 		size <<= 1;
 
-	if (obj_priv->gtt_offset & (size - 1))
+	if (obj_priv->gtt_space->size != size)
 		return false;
 
-	if (INTEL_INFO(obj->dev)->gen == 3) {
-		if (obj_priv->gtt_offset & ~I915_FENCE_START_MASK)
-			return false;
-	} else {
-		if (obj_priv->gtt_offset & ~I830_FENCE_START_MASK)
-			return false;
-	}
+	if (obj_priv->gtt_offset & (size - 1))
+		return false;
 
 	return true;
 }