From: Quentin Colombet <qcolombet@apple.com>
Date: Tue, 8 Mar 2016 01:48:08 +0000 (+0000)
Subject: [AArch64][GlobalISel] Add a test case for the IRTranslator.
X-Git-Tag: llvmorg-3.9.0-rc1~12291
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=dca821683cdf118e95c3f361ffb762f766cb01f1;p=platform%2Fupstream%2Fllvm.git

[AArch64][GlobalISel] Add a test case for the IRTranslator.

llvm-svn: 262898
---

diff --git a/llvm/test/CodeGen/AArch64/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/arm64-irtranslator.ll
new file mode 100644
index 0000000..ffae84c
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/arm64-irtranslator.ll
@@ -0,0 +1,18 @@
+; RUN: llc -stop-after=irtranslator -global-isel %s -o - 2>&1 | FileCheck %s
+; REQUIRES: global-isel
+; This file checks that the translation from llvm IR to generic MachineInstr
+; is correct.
+target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-apple-ios"
+
+; Tests for add.
+; CHECK: name: addi64
+; CHECK: [[ARG1:%[0-9]+]](64) = COPY %x0
+; CHECK-NEXT: [[ARG2:%[0-9]+]](64) = COPY %x1
+; CHECK-NEXT: [[RES:%[0-9]+]](64) = G_ADD i64 [[ARG1]], [[ARG2]]
+; CHECK-NEXT: %x0 = COPY [[RES]]
+; CHECK-NEXT: RET_ReallyLR implicit %x0 
+define i64 @addi64(i64 %arg1, i64 %arg2) {
+  %res = add i64 %arg1, %arg2
+  ret i64 %res
+}