From: Jason Ekstrand Date: Fri, 5 Aug 2016 22:06:36 +0000 (-0700) Subject: isl/state: Only set clear color if aux is used X-Git-Tag: upstream/17.1.0~7261 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=dc880c99b656988eadf012000a01869e40be8f57;p=platform%2Fupstream%2Fmesa.git isl/state: Only set clear color if aux is used Otherwise, the clear color will get ignored. This prevents assertion errors if clear color is set to something invalid and aux is not used. Reviewed-by: Topi Pohjolainen --- diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c index 990b763..4a7e921 100644 --- a/src/intel/isl/isl_surface_state.c +++ b/src/intel/isl/isl_surface_state.c @@ -503,35 +503,37 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state, } #endif + if (info->aux_usage != ISL_AUX_USAGE_NONE) { #if GEN_GEN >= 9 - s.RedClearColor = info->clear_color.u32[0]; - s.GreenClearColor = info->clear_color.u32[1]; - s.BlueClearColor = info->clear_color.u32[2]; - s.AlphaClearColor = info->clear_color.u32[3]; + s.RedClearColor = info->clear_color.u32[0]; + s.GreenClearColor = info->clear_color.u32[1]; + s.BlueClearColor = info->clear_color.u32[2]; + s.AlphaClearColor = info->clear_color.u32[3]; #elif GEN_GEN >= 7 - /* Prior to Sky Lake, we only have one bit for the clear color which - * gives us 0 or 1 in whatever the surface's format happens to be. - */ - if (isl_format_has_int_channel(info->view->format)) { - for (unsigned i = 0; i < 4; i++) { - assert(info->clear_color.u32[i] == 0 || - info->clear_color.u32[i] == 1); - } - s.RedClearColor = info->clear_color.u32[0] != 0; - s.GreenClearColor = info->clear_color.u32[1] != 0; - s.BlueClearColor = info->clear_color.u32[2] != 0; - s.AlphaClearColor = info->clear_color.u32[3] != 0; - } else { - for (unsigned i = 0; i < 4; i++) { - assert(info->clear_color.f32[i] == 0.0f || - info->clear_color.f32[i] == 1.0f); + /* Prior to Sky Lake, we only have one bit for the clear color which + * gives us 0 or 1 in whatever the surface's format happens to be. + */ + if (isl_format_has_int_channel(info->view->format)) { + for (unsigned i = 0; i < 4; i++) { + assert(info->clear_color.u32[i] == 0 || + info->clear_color.u32[i] == 1); + } + s.RedClearColor = info->clear_color.u32[0] != 0; + s.GreenClearColor = info->clear_color.u32[1] != 0; + s.BlueClearColor = info->clear_color.u32[2] != 0; + s.AlphaClearColor = info->clear_color.u32[3] != 0; + } else { + for (unsigned i = 0; i < 4; i++) { + assert(info->clear_color.f32[i] == 0.0f || + info->clear_color.f32[i] == 1.0f); + } + s.RedClearColor = info->clear_color.f32[0] != 0.0f; + s.GreenClearColor = info->clear_color.f32[1] != 0.0f; + s.BlueClearColor = info->clear_color.f32[2] != 0.0f; + s.AlphaClearColor = info->clear_color.f32[3] != 0.0f; } - s.RedClearColor = info->clear_color.f32[0] != 0.0f; - s.GreenClearColor = info->clear_color.f32[1] != 0.0f; - s.BlueClearColor = info->clear_color.f32[2] != 0.0f; - s.AlphaClearColor = info->clear_color.f32[3] != 0.0f; - } #endif + } GENX(RENDER_SURFACE_STATE_pack)(NULL, state, &s); }