From: Timur Kristóf Date: Tue, 4 Jul 2023 12:28:45 +0000 (+0200) Subject: aco: Fix subgroup_id intrinsic on GFX10.3+. X-Git-Tag: upstream/23.3.3~5636 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=dc3bbd351a081a90b57a8772ade8d693048f6403;p=platform%2Fupstream%2Fmesa.git aco: Fix subgroup_id intrinsic on GFX10.3+. Change this to match how it works in the LLVM backend. Cc: mesa-stable Signed-off-by: Timur Kristóf Reviewed-by: Rhys Perry Part-of: --- diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 84a7ee0..b349f15 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -8235,9 +8235,10 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr) } case nir_intrinsic_load_subgroup_id: { if (ctx->stage.hw == AC_HW_COMPUTE_SHADER) { + const unsigned bfe_const = + ctx->program->gfx_level >= GFX10_3 ? (0x14u | 0x5u << 16) : (0x6u | (0x6u << 16)); bld.sop2(aco_opcode::s_bfe_u32, Definition(get_ssa_temp(ctx, &instr->dest.ssa)), - bld.def(s1, scc), get_arg(ctx, ctx->args->tg_size), - Operand::c32(0x6u | (0x6u << 16))); + bld.def(s1, scc), get_arg(ctx, ctx->args->tg_size), Operand::c32(bfe_const)); } else if (ctx->stage.hw == AC_HW_NEXT_GEN_GEOMETRY_SHADER) { /* Get the id of the current wave within the threadgroup (workgroup) */ bld.sop2(aco_opcode::s_bfe_u32, Definition(get_ssa_temp(ctx, &instr->dest.ssa)),