From: Christoph Hellwig Date: Mon, 4 Oct 2010 13:29:41 +0000 (+0200) Subject: ide: set WCACHE supported in IDENTIFY data X-Git-Tag: TizenStudio_2.0_p2.3~3979^2~7 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=dc1ce66920820c6681ffda617218e34db133edc5;p=sdk%2Femulator%2Fqemu.git ide: set WCACHE supported in IDENTIFY data ATA does not only have the WCACHE enabled bit in identify word 85, but also a WCACHE supported bit in word 82. While the Linux kernel is fine with the latter at least hdparm also needs the former before correctly displaying the cache settings. There's also a non-zero chance other operating systems are more picky in their volatile write cache detection. Signed-off-by: Christoph Hellwig Signed-off-by: Kevin Wolf --- diff --git a/hw/ide/core.c b/hw/ide/core.c index 06b6e14..5ccb09c 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -146,8 +146,8 @@ static void ide_identify(IDEState *s) put_le16(p + 68, 120); put_le16(p + 80, 0xf0); /* ata3 -> ata6 supported */ put_le16(p + 81, 0x16); /* conforms to ata5 */ - /* 14=NOP supported, 0=SMART supported */ - put_le16(p + 82, (1 << 14) | 1); + /* 14=NOP supported, 5=WCACHE supported, 0=SMART supported */ + put_le16(p + 82, (1 << 14) | (1 << 5) | 1); /* 13=flush_cache_ext,12=flush_cache,10=lba48 */ put_le16(p + 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10)); /* 14=set to 1, 1=SMART self test, 0=SMART error logging */