From: Tim Northover Date: Wed, 5 Nov 2014 00:27:20 +0000 (+0000) Subject: ARM: try to add extra CS-register whenever stack alignment >= 8. X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=dc0d9e46a5efbcd496fe60070f569185a9418397;p=platform%2Fupstream%2Fllvm.git ARM: try to add extra CS-register whenever stack alignment >= 8. We currently try to push an even number of registers to preserve 8-byte alignment during a function's prologue, but only when the stack alignment is prcisely 8. Many of the reasons for doing it apply also when that alignment > 8 (the extra store is often free, and can save another stack adjustment, though less frequently for 16-byte stack alignment). llvm-svn: 221321 --- diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp index 4589799..6ebc3aa 100644 --- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp +++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp @@ -1575,7 +1575,7 @@ ARMFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, // of GPRs, spill one extra callee save GPR so we won't have to pad between // the integer and double callee save areas. unsigned TargetAlign = getStackAlignment(); - if (TargetAlign == 8 && (NumGPRSpills & 1)) { + if (TargetAlign >= 8 && (NumGPRSpills & 1)) { if (CS1Spilled && !UnspilledCS1GPRs.empty()) { for (unsigned i = 0, e = UnspilledCS1GPRs.size(); i != e; ++i) { unsigned Reg = UnspilledCS1GPRs[i]; diff --git a/llvm/test/CodeGen/ARM/varargs-spill-stack-align-nacl.ll b/llvm/test/CodeGen/ARM/varargs-spill-stack-align-nacl.ll index 19d6cbe..148a79d 100644 --- a/llvm/test/CodeGen/ARM/varargs-spill-stack-align-nacl.ll +++ b/llvm/test/CodeGen/ARM/varargs-spill-stack-align-nacl.ll @@ -22,9 +22,9 @@ define void @varargs_func(i32 %arg1, ...) { ; Reserve space for the varargs save area. This currently reserves ; more than enough (16 bytes rather than the 12 bytes needed). ; CHECK: sub sp, sp, #16 -; CHECK: push {lr} +; CHECK: push {r11, lr} ; Align the stack pointer to a multiple of 16. -; CHECK: sub sp, sp, #12 +; CHECK: sub sp, sp, #8 ; Calculate the address of the varargs save area and save varargs ; arguments into it. ; CHECK-NEXT: add r0, sp, #20