From: Mac Chiang Date: Thu, 20 Jan 2022 05:40:12 +0000 (-0500) Subject: ASoC: Intel: sof_rt5682: add 512FS MCLK clock configuration X-Git-Tag: v6.6.17~6759^2~120^2~198 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=dbf2f8e3fecd5b2197f406f26fed26042664044e;p=platform%2Fkernel%2Flinux-rpi.git ASoC: Intel: sof_rt5682: add 512FS MCLK clock configuration codec system clock source support 512FS MCLK synchronous directly, so no need to set PLL configuration when MCLK 24.576MHz. Suggested-by: Shuming Fan Signed-off-by: Mac Chiang Acked-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20220120054012.15849-1-mac.chiang@intel.com Signed-off-by: Mark Brown --- diff --git a/sound/soc/intel/boards/sof_rt5682.c b/sound/soc/intel/boards/sof_rt5682.c index bd6d2e7dea53..f4e833cbffe1 100644 --- a/sound/soc/intel/boards/sof_rt5682.c +++ b/sound/soc/intel/boards/sof_rt5682.c @@ -369,11 +369,16 @@ static int sof_rt5682_hw_params(struct snd_pcm_substream *substream, pll_out = params_rate(params) * 512; - /* Configure pll for codec */ - ret = snd_soc_dai_set_pll(codec_dai, pll_id, pll_source, pll_in, - pll_out); - if (ret < 0) - dev_err(rtd->dev, "snd_soc_dai_set_pll err = %d\n", ret); + /* when MCLK is 512FS, no need to set PLL configuration additionally. */ + if (pll_in == pll_out) + clk_id = RT5682S_SCLK_S_MCLK; + else { + /* Configure pll for codec */ + ret = snd_soc_dai_set_pll(codec_dai, pll_id, pll_source, pll_in, + pll_out); + if (ret < 0) + dev_err(rtd->dev, "snd_soc_dai_set_pll err = %d\n", ret); + } /* Configure sysclk for codec */ ret = snd_soc_dai_set_sysclk(codec_dai, clk_id,