From: Catalin Marinas Date: Mon, 1 Feb 2010 17:50:40 +0000 (+0100) Subject: ARM: 5909/1: ARM: Correct the FPSCR bits setting when raising exceptions X-Git-Tag: v2.6.33-rc7~10^2~2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=dbead405801c8d5aa1bc21ab6e2a47f060d47c06;p=platform%2Fupstream%2Fkernel-adaptation-pc.git ARM: 5909/1: ARM: Correct the FPSCR bits setting when raising exceptions Commit c98929c07a removed the clearing of the FPSCR[31:28] bits from the vfp_raise_exceptions() function and the new bits are or'ed with the old FPSCR bits leading to unexpected results (the original commit was referring to the cumulative bits - FPSCR[4:0]). Reported-by: Tom Hameenanttila Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index f60a540..a63c4be 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -197,10 +197,13 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ } /* - * Update the FPSCR with the additional exception flags. + * If any of the status flags are set, update the FPSCR. * Comparison instructions always return at least one of * these flags set. */ + if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V)) + fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V); + fpscr |= exceptions; fmxr(FPSCR, fpscr);