From: Pavel Ondračka Date: Wed, 26 Apr 2023 08:18:20 +0000 (+0200) Subject: r300: fix unconditional KIL on R300/R400 X-Git-Tag: upstream/23.3.3~9476 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=db6c3cd13ded5c4a89fb8dbfaef714432b8e1ed9;p=platform%2Fupstream%2Fmesa.git r300: fix unconditional KIL on R300/R400 0: KIL -none.1111 Negate is not allowed for texturing opcodes, so the incorrect swizzle was detected, however later optimization, where we try to rewrite incorrect swizzles from constant (immediate) registers by adding a new ones with correct order was interfering and not handling this correctly, so we ended with CONST[0] = { -1.0000 -1.0000 -1.0000 -1.0000 } 0: KIL const[0].xyz-w; Even if it would get the swizzle right, texturing opcodes can't read from constant registers, so just skip it and let this be handled by a later part which inserts an extra mov instead. Signed-off-by: Pavel Ondračka Reviewed-by: Filip Gawin Fixes: a8e1e5b5c2aeb7c2fb4eff2203a026090f0853b9 Part-of: --- diff --git a/src/gallium/drivers/r300/compiler/radeon_dataflow_swizzles.c b/src/gallium/drivers/r300/compiler/radeon_dataflow_swizzles.c index cf304db..cea7f85 100644 --- a/src/gallium/drivers/r300/compiler/radeon_dataflow_swizzles.c +++ b/src/gallium/drivers/r300/compiler/radeon_dataflow_swizzles.c @@ -580,6 +580,7 @@ void rc_dataflow_swizzles(struct radeon_compiler * c, void *user) } if (!c->is_r500 && c->Program.Constants.Count < R300_PFS_NUM_CONST_REGS && + (!opcode->HasTexture && inst->U.I.Opcode != RC_OPCODE_KIL) && try_rewrite_constant(c, reg)) { continue; }