From: Adam Nemet Date: Wed, 27 Jan 2016 22:21:25 +0000 (+0000) Subject: [TTI] Add getPrefetchDistance from PPCLoopDataPrefetch, NFC X-Git-Tag: llvmorg-3.9.0-rc1~15795 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=dadfbb52f771fc3d3dc9721714598630f5d53146;p=platform%2Fupstream%2Fllvm.git [TTI] Add getPrefetchDistance from PPCLoopDataPrefetch, NFC This patch is part of the work to make PPCLoopDataPrefetch target-independent (http://thread.gmane.org/gmane.comp.compilers.llvm.devel/92758). As it was discussed in the above thread, getPrefetchDistance is currently using instruction count which may change in the future. llvm-svn: 258995 --- diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h index 30bda63..3125853 100644 --- a/llvm/include/llvm/Analysis/TargetTransformInfo.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h @@ -419,6 +419,10 @@ public: /// \return The size of a cache line in bytes. unsigned getCacheLineSize() const; + /// \return How much before a load we should place the prefetch instruction. + /// This is currently measured in number of instructions. + unsigned getPrefetchDistance() const; + /// \return The maximum interleave factor that any transform should try to /// perform for this target. This number depends on the level of parallelism /// and the number of execution units in the CPU. @@ -613,6 +617,7 @@ public: virtual unsigned getNumberOfRegisters(bool Vector) = 0; virtual unsigned getRegisterBitWidth(bool Vector) = 0; virtual unsigned getCacheLineSize() = 0; + virtual unsigned getPrefetchDistance() = 0; virtual unsigned getMaxInterleaveFactor(unsigned VF) = 0; virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind Opd1Info, @@ -782,6 +787,7 @@ public: unsigned getCacheLineSize() override { return Impl.getCacheLineSize(); } + unsigned getPrefetchDistance() override { return Impl.getPrefetchDistance(); } unsigned getMaxInterleaveFactor(unsigned VF) override { return Impl.getMaxInterleaveFactor(VF); } diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h index f4257da..ec797b1 100644 --- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h @@ -266,6 +266,8 @@ public: unsigned getCacheLineSize() { return 0; } + unsigned getPrefetchDistance() { return 0; } + unsigned getMaxInterleaveFactor(unsigned VF) { return 1; } unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp index ed7005e..bd95789 100644 --- a/llvm/lib/Analysis/TargetTransformInfo.cpp +++ b/llvm/lib/Analysis/TargetTransformInfo.cpp @@ -219,6 +219,10 @@ unsigned TargetTransformInfo::getCacheLineSize() const { return TTIImpl->getCacheLineSize(); } +unsigned TargetTransformInfo::getPrefetchDistance() const { + return TTIImpl->getPrefetchDistance(); +} + unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const { return TTIImpl->getMaxInterleaveFactor(VF); } diff --git a/llvm/lib/Target/PowerPC/PPCLoopDataPrefetch.cpp b/llvm/lib/Target/PowerPC/PPCLoopDataPrefetch.cpp index c113ae5..14553ab 100644 --- a/llvm/lib/Target/PowerPC/PPCLoopDataPrefetch.cpp +++ b/llvm/lib/Target/PowerPC/PPCLoopDataPrefetch.cpp @@ -44,12 +44,6 @@ static cl::opt PrefetchWrites("ppc-loop-prefetch-writes", cl::Hidden, cl::init(false), cl::desc("Prefetch write addresses")); -// This seems like a reasonable default for the BG/Q (this pass is enabled, by -// default, only on the BG/Q). -static cl::opt -PrefDist("ppc-loop-prefetch-distance", cl::Hidden, cl::init(300), - cl::desc("The loop prefetch distance")); - namespace llvm { void initializePPCLoopDataPrefetchPass(PassRegistry&); } @@ -107,6 +101,8 @@ bool PPCLoopDataPrefetch::runOnFunction(Function &F) { TTI = &getAnalysis().getTTI(F); assert(TTI->getCacheLineSize() && "Cache line size is not set for target"); + assert(TTI->getPrefetchDistance() && + "Prefetch distance is not set for target"); bool MadeChange = false; @@ -147,7 +143,7 @@ bool PPCLoopDataPrefetch::runOnLoop(Loop *L) { if (!LoopSize) LoopSize = 1; - unsigned ItersAhead = PrefDist/LoopSize; + unsigned ItersAhead = TTI->getPrefetchDistance() / LoopSize; if (!ItersAhead) ItersAhead = 1; diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp index b60c07c..9212e91 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp @@ -27,6 +27,12 @@ static cl::opt CacheLineSize("ppc-loop-prefetch-cache-line", cl::Hidden, cl::init(64), cl::desc("The loop prefetch cache line size")); +// This seems like a reasonable default for the BG/Q (this pass is enabled, by +// default, only on the BG/Q). +static cl::opt +PrefDist("ppc-loop-prefetch-distance", cl::Hidden, cl::init(300), + cl::desc("The loop prefetch distance")); + //===----------------------------------------------------------------------===// // // PPC cost model. @@ -242,6 +248,8 @@ unsigned PPCTTIImpl::getCacheLineSize() { return CacheLineSize; } +unsigned PPCTTIImpl::getPrefetchDistance() { return PrefDist; } + unsigned PPCTTIImpl::getMaxInterleaveFactor(unsigned VF) { unsigned Directive = ST->getDarwinDirective(); // The 440 has no SIMD support, but floating-point instructions diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h index d216bdf..5ea9a54 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h @@ -71,6 +71,7 @@ public: unsigned getNumberOfRegisters(bool Vector); unsigned getRegisterBitWidth(bool Vector); unsigned getCacheLineSize(); + unsigned getPrefetchDistance(); unsigned getMaxInterleaveFactor(unsigned VF); int getArithmeticInstrCost( unsigned Opcode, Type *Ty,