From: Tomasz Maciej Nowak <tmn505@gmail.com>
Date: Thu, 30 Mar 2023 18:24:22 +0000 (+0200)
Subject: ARM: dts: trimslice: sync SPI node with Linux dts
X-Git-Tag: v2023.10~33^2~7
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=da880bf7c18041e598def664c641705208359dfa;p=platform%2Fkernel%2Fu-boot.git

ARM: dts: trimslice: sync SPI node with Linux dts

After "spi: spi_flash_probe_bus_cs() rely on DT for spi speed and mode"
series flash speed and mode wasn't passed to driver anymore, which
resulted in:

Loading Environment from SPIFlash... tegra20_sflash spi@7000c380: Invalid chip select 0:0 (err=-19)
*** Warning - spi_flash_probe_bus_cs() failed, using default environment

Fix it by syncing SPI node of affected device dts with Linux kernel dts.
The changed SPI bus frequency doesn't influence stability of read/write
operations.

Ref: https://patchwork.ozlabs.org/project/uboot/cover/20220518064648.1843664-1-patrice.chotard@foss.st.com
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Tom <twarren@nvidia.com>
---

diff --git a/arch/arm/dts/tegra20-trimslice.dts b/arch/arm/dts/tegra20-trimslice.dts
index e19001e..fa942d2 100644
--- a/arch/arm/dts/tegra20-trimslice.dts
+++ b/arch/arm/dts/tegra20-trimslice.dts
@@ -27,7 +27,13 @@
 
 	spi@7000c380 {
 		status = "okay";
-		spi-max-frequency = <25000000>;
+		spi-max-frequency = <48000000>;
+
+		flash@0 {
+			compatible = "winbond,w25q80bl", "jedec,spi-nor";
+			reg = <0>;
+			spi-max-frequency = <48000000>;
+		};
 	};
 
 	pcie@80003000 {