From: Richard Sandiford <richard.sandiford@arm.com>
Date: Wed, 25 Jan 2023 11:24:32 +0000 (+0000)
Subject: aarch64: Restore generation of SVE UQDEC instructions
X-Git-Tag: upstream/13.1.0~1898
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=da43e287d1917a25594f95c7c519ded637c7ea50;p=platform%2Fupstream%2Fgcc.git

aarch64: Restore generation of SVE UQDEC instructions

The addition of TARGET_CSSC meant that we wouldn't generate SVE
UQDEC instructions unless +cssc was also enabled.

Fixes:
- gcc.target/aarch64/sve/slp_4.c
- gcc.target/aarch64/sve/slp_10.c
- gcc.target/aarch64/sve/while_4.c

gcc/
	* config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
	tests.
---

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index e4d7587..0b326d4 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -4457,8 +4457,9 @@
   {
     if (aarch64_sve_cnt_immediate (operands[1], <MODE>mode))
       std::swap (operands[1], operands[2]);
-    else if (!aarch64_sve_cnt_immediate (operands[2], <MODE>mode)
-	     && TARGET_CSSC)
+    else if (aarch64_sve_cnt_immediate (operands[2], <MODE>mode))
+      ;
+    else if (TARGET_CSSC)
       {
 	if (aarch64_uminmax_immediate (operands[1], <MODE>mode))
 	  std::swap (operands[1], operands[2]);