From: Peter Maydell Date: Tue, 28 Apr 2015 09:31:03 +0000 (+0100) Subject: Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150427' into... X-Git-Tag: TizenStudio_2.0_p2.3.2~208^2~224 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=da378d014d27fe3a243bd8e7e060e9eb8c1a272b;p=sdk%2Femulator%2Fqemu.git Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150427' into staging target-arm queue: * memory system updates to support transaction attributes * set user-mode and secure attributes for accesses made by ARM CPUs * rename c1_coproc to cpacr_el1 * adjust id_aa64pfr0 when has_el3 CPU property disabled * allow ARMv8 SCR.SMD updates # gpg: Signature made Mon Apr 27 16:14:30 2015 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell " * remotes/pmaydell/tags/pull-target-arm-20150427: Allow ARMv8 SCR.SMD updates target-arm: Adjust id_aa64pfr0 when has_el3 CPU property disabled target-arm: rename c1_coproc to cpacr_el1 target-arm: Check watchpoints against CPU security state target-arm: Use attribute info to handle user-only watchpoints target-arm: Add user-mode transaction attribute target-arm: Use correct memory attributes for page table walks target-arm: Honour NS bits in page tables Switch non-CPU callers from ld/st*_phys to address_space_ld/st* exec.c: Capture the memory attributes for a watchpoint hit exec.c: Add new address_space_ld*/st* functions exec.c: Make address_space_rw take transaction attributes exec.c: Convert subpage memory ops to _with_attrs Add MemTxAttrs to the IOTLB Make CPU iotlb a structure rather than a plain hwaddr memory: Replace io_mem_read/write with memory_region_dispatch_read/write memory: Define API for MemoryRegionOps to take attrs and return status Signed-off-by: Peter Maydell --- da378d014d27fe3a243bd8e7e060e9eb8c1a272b