From: Ville Syrjälä Date: Wed, 21 Jan 2015 17:38:01 +0000 (+0200) Subject: drm/i915: Change VLV WIZ hashing mode to 16x4 X-Git-Tag: v5.15~15919^2~35^2~134 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=da2518f9262c89dd182894b29ba45e3d8c95f65c;p=platform%2Fkernel%2Flinux-starfive.git drm/i915: Change VLV WIZ hashing mode to 16x4 We set the WIZ hashing mode to 16x4 for all the other gen6+ platfotrms, so let's follow suit on VLV. My VLV is AWOL currently so I didn't test this, but since the results for all the other platforms agree that 16x4 is the fastest we might assume the same holds for VLV. Signed-off-by: Ville Syrjälä Reviewed-by: Arun Siluvery Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index e94371e..3e630fe 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -6230,6 +6230,17 @@ static void valleyview_init_clock_gating(struct drm_device *dev) _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE)); /* + * BSpec recommends 8x4 when MSAA is used, + * however in practice 16x4 seems fastest. + * + * Note that PS/WM thread counts depend on the WIZ hashing + * disable bit, which we don't touch here, but it's good + * to keep in mind (see 3DSTATE_PS and 3DSTATE_WM). + */ + I915_WRITE(GEN7_GT_MODE, + _MASKED_FIELD(GEN6_WIZ_HASHING_MASK, GEN6_WIZ_HASHING_16x4)); + + /* * WaIncreaseL3CreditsForVLVB0:vlv * This is the hardware default actually. */