From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Wed, 21 Dec 2022 15:46:23 +0000 (-0500)
Subject: llvm-reduce: Remove test dependence on registered targets
X-Git-Tag: upstream/17.0.6~22956
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d8fb46ee5555e73ab7a835b0098d0d7ee371c18b;p=platform%2Fupstream%2Fllvm.git

llvm-reduce: Remove test dependence on registered targets

This reverts e4b126cc2d33033a5538d72a88f6aa153ac8b757 and
e57ab8fe91f06e71d3de2df07e6c7efd2f0c6078.

This previously depended on where the target happened to construct (or
not) the MachineFunctionInfo during the initial MIR construction. Now
that the MachineFunctionInfo is consistently constructed at
MachineFunction construction time, this should always work.
---

diff --git a/llvm/test/tools/llvm-reduce/file-output-type.test b/llvm/test/tools/llvm-reduce/file-output-type.test
index bbfbeb2..4d7b35d 100644
--- a/llvm/test/tools/llvm-reduce/file-output-type.test
+++ b/llvm/test/tools/llvm-reduce/file-output-type.test
@@ -1,4 +1,3 @@
-# REQUIRES: x86-registered-target
 # RUN: rm -f reduced.ll reduced.bc
 
 # RUN: llvm-as -o test-output-format.bc %p/Inputs/test-output-format.ll
@@ -41,7 +40,7 @@
 
 
 # Make sure MIR ignores requests for bitcode
-# RUN: llvm-reduce -mtriple=x86_64-- -output-bitcode --delta-passes=instructions -o %t.3  --test FileCheck --test-arg --check-prefix=MIR --test-arg %s --test-arg --input-file %p/Inputs/test-output-format.mir
+# RUN: llvm-reduce -output-bitcode --delta-passes=instructions -o %t.3 --test FileCheck --test-arg --check-prefix=MIR --test-arg %s --test-arg --input-file %p/Inputs/test-output-format.mir
 # RUN: llc -x mir -run-pass=none -o /dev/null %t.3