From: Colin Ian King Date: Fri, 21 Jul 2017 13:42:52 +0000 (+0100) Subject: staging: rtl8192u: fix incorrect mask and shift on u8 data X-Git-Tag: v5.15~10534^2~358 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d8acde4ddbcdab4a2753660b6e5a490ad26f2f1a;p=platform%2Fkernel%2Flinux-starfive.git staging: rtl8192u: fix incorrect mask and shift on u8 data The cfg_action bit comes from the high bit of pmsg[4] so the current mask and shift are in correct and always result in zero. Fix this by using the correct mask and shif to get the correct cfg_action bit value. Detected by CoverityScan, CID#142890 ("Operands don't affect result") Signed-off-by: Colin Ian King Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/rtl8192u/r819xU_cmdpkt.c b/drivers/staging/rtl8192u/r819xU_cmdpkt.c index 87ab3ba..ae9a4f1 100644 --- a/drivers/staging/rtl8192u/r819xU_cmdpkt.c +++ b/drivers/staging/rtl8192u/r819xU_cmdpkt.c @@ -294,7 +294,7 @@ static void cmpk_handle_query_config_rx(struct net_device *dev, u8 *pmsg) * windows OS. So we have to read the content byte by byte or transfer * endian type before copy the message copy. */ - rx_query_cfg.cfg_action = (pmsg[4] & 0x80000000) >> 31; + rx_query_cfg.cfg_action = (pmsg[4] & 0x80) >> 7; rx_query_cfg.cfg_type = (pmsg[4] & 0x60) >> 5; rx_query_cfg.cfg_size = (pmsg[4] & 0x18) >> 3; rx_query_cfg.cfg_page = (pmsg[6] & 0x0F) >> 0;