From: Chia-I Wu Date: Tue, 27 Jan 2015 12:10:46 +0000 (+0800) Subject: ilo: update surface state emission for Gen8 X-Git-Tag: upstream/17.1.0~20847 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d8927ab02f8527cbf489823c76768308829720c8;p=platform%2Fupstream%2Fmesa.git ilo: update surface state emission for Gen8 --- diff --git a/src/gallium/drivers/ilo/ilo_render_surface.c b/src/gallium/drivers/ilo/ilo_render_surface.c index 657fbfd..97660d0 100644 --- a/src/gallium/drivers/ilo/ilo_render_surface.c +++ b/src/gallium/drivers/ilo/ilo_render_surface.c @@ -43,7 +43,7 @@ gen6_emit_draw_surface_rt(struct ilo_render *r, uint32_t *surface_state; int base, count, i; - ILO_DEV_ASSERT(r->dev, 6, 7.5); + ILO_DEV_ASSERT(r->dev, 6, 8); if (!DIRTY(FS) && !DIRTY(FB)) return; @@ -134,7 +134,7 @@ gen6_emit_draw_surface_view(struct ilo_render *r, uint32_t *surface_state; int base, count, i; - ILO_DEV_ASSERT(r->dev, 6, 7.5); + ILO_DEV_ASSERT(r->dev, 6, 8); switch (shader_type) { case PIPE_SHADER_VERTEX: @@ -191,7 +191,7 @@ gen6_emit_draw_surface_const(struct ilo_render *r, uint32_t *surface_state; int base, count, i; - ILO_DEV_ASSERT(r->dev, 6, 7.5); + ILO_DEV_ASSERT(r->dev, 6, 8); switch (shader_type) { case PIPE_SHADER_VERTEX: @@ -244,7 +244,7 @@ gen6_emit_draw_surface_binding_tables(struct ilo_render *r, { int count; - ILO_DEV_ASSERT(r->dev, 6, 7.5); + ILO_DEV_ASSERT(r->dev, 6, 8); /* BINDING_TABLE_STATE */ switch (shader_type) { @@ -301,12 +301,13 @@ ilo_render_get_draw_surface_states_len(const struct ilo_render *render, { int sh_type, len; - ILO_DEV_ASSERT(render->dev, 6, 7.5); + ILO_DEV_ASSERT(render->dev, 6, 8); len = 0; for (sh_type = 0; sh_type < PIPE_SHADER_TYPES; sh_type++) { - const int alignment = 32 / 4; + const int alignment = + (ilo_dev_gen(render->dev) >= ILO_GEN(8) ? 64 : 32) / 4; int num_surfaces = 0; switch (sh_type) { @@ -355,7 +356,7 @@ ilo_render_emit_draw_surface_states(struct ilo_render *render, const unsigned surface_used = ilo_builder_surface_used(render->builder); int shader_type; - ILO_DEV_ASSERT(render->dev, 6, 7.5); + ILO_DEV_ASSERT(render->dev, 6, 8); /* * upload all SURAFCE_STATEs together so that we know there are minimal