From: H.J. Lu Date: Mon, 5 Jul 2010 17:14:22 +0000 (+0000) Subject: Replace rdrnd with rdrand. X-Git-Tag: gdb_7_2-2010-07-07-branchpoint~30 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d7d9a9f820395ecfe06c80fa12bf9cf60f455482;p=external%2Fbinutils.git Replace rdrnd with rdrand. gas/testsuite/ 2010-07-05 H.J. Lu AVX Programming Reference (June, 2010) * gas/i386/rdrnd.s: Replace rdrnd with rdrand. * gas/i386/rdrnd-intel.d: Likewise. * gas/i386/rdrnd.d: Likewise. * gas/i386/x86-64-rdrnd-intel.d: Likewise. * gas/i386/x86-64-rdrnd.d: Likewise. * gas/i386/x86-64-rdrnd.s: Likewise. opcodes/ 2010-07-05 H.J. Lu AVX Programming Reference (June, 2010) * i386-dis.c (mod_table): Replace rdrnd with rdrand. * i386-opc.tbl: Likewise. * i386-tbl.h: Regenerated. --- diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index fbe6d72..4a97906 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,15 @@ 2010-07-05 H.J. Lu + AVX Programming Reference (June, 2010) + * gas/i386/rdrnd.s: Replace rdrnd with rdrand. + * gas/i386/rdrnd-intel.d: Likewise. + * gas/i386/rdrnd.d: Likewise. + * gas/i386/x86-64-rdrnd-intel.d: Likewise. + * gas/i386/x86-64-rdrnd.d: Likewise. + * gas/i386/x86-64-rdrnd.s: Likewise. + +2010-07-05 H.J. Lu + PR gas/10531 PR gas/11789 * gas/i386/dw2-compress-1.d: Remove bogus line debug info. diff --git a/gas/testsuite/gas/i386/rdrnd-intel.d b/gas/testsuite/gas/i386/rdrnd-intel.d index 80dda0b..57423fa 100644 --- a/gas/testsuite/gas/i386/rdrnd-intel.d +++ b/gas/testsuite/gas/i386/rdrnd-intel.d @@ -8,8 +8,8 @@ Disassembly of section .text: 0+ : -[ ]*[a-f0-9]+: 66 0f c7 f3 rdrnd bx -[ ]*[a-f0-9]+: 0f c7 f3 rdrnd ebx -[ ]*[a-f0-9]+: 66 0f c7 f3 rdrnd bx -[ ]*[a-f0-9]+: 0f c7 f3 rdrnd ebx +[ ]*[a-f0-9]+: 66 0f c7 f3 rdrand bx +[ ]*[a-f0-9]+: 0f c7 f3 rdrand ebx +[ ]*[a-f0-9]+: 66 0f c7 f3 rdrand bx +[ ]*[a-f0-9]+: 0f c7 f3 rdrand ebx #pass diff --git a/gas/testsuite/gas/i386/rdrnd.d b/gas/testsuite/gas/i386/rdrnd.d index f085c26..3b16c84 100644 --- a/gas/testsuite/gas/i386/rdrnd.d +++ b/gas/testsuite/gas/i386/rdrnd.d @@ -7,8 +7,8 @@ Disassembly of section .text: 0+ : -[ ]*[a-f0-9]+: 66 0f c7 f3 rdrnd %bx -[ ]*[a-f0-9]+: 0f c7 f3 rdrnd %ebx -[ ]*[a-f0-9]+: 66 0f c7 f3 rdrnd %bx -[ ]*[a-f0-9]+: 0f c7 f3 rdrnd %ebx +[ ]*[a-f0-9]+: 66 0f c7 f3 rdrand %bx +[ ]*[a-f0-9]+: 0f c7 f3 rdrand %ebx +[ ]*[a-f0-9]+: 66 0f c7 f3 rdrand %bx +[ ]*[a-f0-9]+: 0f c7 f3 rdrand %ebx #pass diff --git a/gas/testsuite/gas/i386/rdrnd.s b/gas/testsuite/gas/i386/rdrnd.s index b3e0e69..7fc0fdf 100644 --- a/gas/testsuite/gas/i386/rdrnd.s +++ b/gas/testsuite/gas/i386/rdrnd.s @@ -2,9 +2,9 @@ .text foo: - rdrnd %bx - rdrnd %ebx + rdrand %bx + rdrand %ebx .intel_syntax noprefix - rdrnd bx - rdrnd ebx + rdrand bx + rdrand ebx diff --git a/gas/testsuite/gas/i386/x86-64-rdrnd-intel.d b/gas/testsuite/gas/i386/x86-64-rdrnd-intel.d index 293fe36..0bb8798 100644 --- a/gas/testsuite/gas/i386/x86-64-rdrnd-intel.d +++ b/gas/testsuite/gas/i386/x86-64-rdrnd-intel.d @@ -8,16 +8,16 @@ Disassembly of section .text: 0+ : -[ ]*[a-f0-9]+: 66 0f c7 f3 rdrnd bx -[ ]*[a-f0-9]+: 0f c7 f3 rdrnd ebx -[ ]*[a-f0-9]+: 48 0f c7 f3 rdrnd rbx -[ ]*[a-f0-9]+: 66 41 0f c7 f0 rdrnd r8w -[ ]*[a-f0-9]+: 41 0f c7 f0 rdrnd r8d -[ ]*[a-f0-9]+: 49 0f c7 f0 rdrnd r8 -[ ]*[a-f0-9]+: 66 0f c7 f3 rdrnd bx -[ ]*[a-f0-9]+: 0f c7 f3 rdrnd ebx -[ ]*[a-f0-9]+: 48 0f c7 f3 rdrnd rbx -[ ]*[a-f0-9]+: 66 41 0f c7 f0 rdrnd r8w -[ ]*[a-f0-9]+: 41 0f c7 f0 rdrnd r8d -[ ]*[a-f0-9]+: 49 0f c7 f0 rdrnd r8 +[ ]*[a-f0-9]+: 66 0f c7 f3 rdrand bx +[ ]*[a-f0-9]+: 0f c7 f3 rdrand ebx +[ ]*[a-f0-9]+: 48 0f c7 f3 rdrand rbx +[ ]*[a-f0-9]+: 66 41 0f c7 f0 rdrand r8w +[ ]*[a-f0-9]+: 41 0f c7 f0 rdrand r8d +[ ]*[a-f0-9]+: 49 0f c7 f0 rdrand r8 +[ ]*[a-f0-9]+: 66 0f c7 f3 rdrand bx +[ ]*[a-f0-9]+: 0f c7 f3 rdrand ebx +[ ]*[a-f0-9]+: 48 0f c7 f3 rdrand rbx +[ ]*[a-f0-9]+: 66 41 0f c7 f0 rdrand r8w +[ ]*[a-f0-9]+: 41 0f c7 f0 rdrand r8d +[ ]*[a-f0-9]+: 49 0f c7 f0 rdrand r8 #pass diff --git a/gas/testsuite/gas/i386/x86-64-rdrnd.d b/gas/testsuite/gas/i386/x86-64-rdrnd.d index 90c0f9a..8e971f6 100644 --- a/gas/testsuite/gas/i386/x86-64-rdrnd.d +++ b/gas/testsuite/gas/i386/x86-64-rdrnd.d @@ -7,16 +7,16 @@ Disassembly of section .text: 0+ : -[ ]*[a-f0-9]+: 66 0f c7 f3 rdrnd %bx -[ ]*[a-f0-9]+: 0f c7 f3 rdrnd %ebx -[ ]*[a-f0-9]+: 48 0f c7 f3 rdrnd %rbx -[ ]*[a-f0-9]+: 66 41 0f c7 f0 rdrnd %r8w -[ ]*[a-f0-9]+: 41 0f c7 f0 rdrnd %r8d -[ ]*[a-f0-9]+: 49 0f c7 f0 rdrnd %r8 -[ ]*[a-f0-9]+: 66 0f c7 f3 rdrnd %bx -[ ]*[a-f0-9]+: 0f c7 f3 rdrnd %ebx -[ ]*[a-f0-9]+: 48 0f c7 f3 rdrnd %rbx -[ ]*[a-f0-9]+: 66 41 0f c7 f0 rdrnd %r8w -[ ]*[a-f0-9]+: 41 0f c7 f0 rdrnd %r8d -[ ]*[a-f0-9]+: 49 0f c7 f0 rdrnd %r8 +[ ]*[a-f0-9]+: 66 0f c7 f3 rdrand %bx +[ ]*[a-f0-9]+: 0f c7 f3 rdrand %ebx +[ ]*[a-f0-9]+: 48 0f c7 f3 rdrand %rbx +[ ]*[a-f0-9]+: 66 41 0f c7 f0 rdrand %r8w +[ ]*[a-f0-9]+: 41 0f c7 f0 rdrand %r8d +[ ]*[a-f0-9]+: 49 0f c7 f0 rdrand %r8 +[ ]*[a-f0-9]+: 66 0f c7 f3 rdrand %bx +[ ]*[a-f0-9]+: 0f c7 f3 rdrand %ebx +[ ]*[a-f0-9]+: 48 0f c7 f3 rdrand %rbx +[ ]*[a-f0-9]+: 66 41 0f c7 f0 rdrand %r8w +[ ]*[a-f0-9]+: 41 0f c7 f0 rdrand %r8d +[ ]*[a-f0-9]+: 49 0f c7 f0 rdrand %r8 #pass diff --git a/gas/testsuite/gas/i386/x86-64-rdrnd.s b/gas/testsuite/gas/i386/x86-64-rdrnd.s index b1b3d1c..2d9df16 100644 --- a/gas/testsuite/gas/i386/x86-64-rdrnd.s +++ b/gas/testsuite/gas/i386/x86-64-rdrnd.s @@ -2,17 +2,17 @@ .text foo: - rdrnd %bx - rdrnd %ebx - rdrnd %rbx - rdrnd %r8w - rdrnd %r8d - rdrnd %r8 + rdrand %bx + rdrand %ebx + rdrand %rbx + rdrand %r8w + rdrand %r8d + rdrand %r8 .intel_syntax noprefix - rdrnd bx - rdrnd ebx - rdrnd rbx - rdrnd r8w - rdrnd r8d - rdrnd r8 + rdrand bx + rdrand ebx + rdrand rbx + rdrand r8w + rdrand r8d + rdrand r8 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 96fffad..6b3b56c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,12 @@ 2010-07-05 H.J. Lu + AVX Programming Reference (June, 2010) + * i386-dis.c (mod_table): Replace rdrnd with rdrand. + * i386-opc.tbl: Likewise. + * i386-tbl.h: Regenerated. + +2010-07-05 H.J. Lu + * i386-opc.h (CpuFSGSBase): Fix a typo in comments. 2010-07-03 Andreas Schwab diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 224540e..1f9d01d 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -10450,7 +10450,7 @@ static const struct dis386 mod_table[][2] = { { /* MOD_0FC7_REG_6 */ { PREFIX_TABLE (PREFIX_0FC7_REG_6) }, - { "rdrnd", { Ev } }, + { "rdrand", { Ev } }, }, { /* MOD_0FC7_REG_7 */ diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index ef48720..010a632 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -2394,7 +2394,7 @@ vpclmulhqhqdq, 3, 0x6644, 0x11, 1, CpuAVX|CpuPCLMUL, Modrm|Vex|VexOpcode=2|VexVV rdfsbase, 1, 0xf30fae, 0x0, 2, CpuFSGSBase, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Reg64 } rdgsbase, 1, 0xf30fae, 0x1, 2, CpuFSGSBase, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Reg64 } -rdrnd, 1, 0xfc7, 0x6, 2, CpuRdRnd, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32|Reg64 } +rdrand, 1, 0xfc7, 0x6, 2, CpuRdRnd, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32|Reg64 } wrfsbase, 1, 0xf30fae, 0x2, 2, CpuFSGSBase, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Reg64 } wrgsbase, 1, 0xf30fae, 0x3, 2, CpuFSGSBase, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Reg64 } vcvtph2ps, 2, 0x6613, None, 1, CpuF16C, Modrm|Vex|VexOpcode=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 1bc2e53..806ad6e 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -27311,7 +27311,7 @@ const insn_template i386_optab[] = { { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "rdrnd", 1, 0xfc7, 0x6, 2, + { "rdrand", 1, 0xfc7, 0x6, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } },