From: Alexey Bataev <a.bataev@outlook.com>
Date: Wed, 5 Oct 2022 14:52:39 +0000 (-0700)
Subject: [SLP][NFC]Add a test for CSE for extractelements.
X-Git-Tag: upstream/17.0.6~31519
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d7c85d7e3403120166e1972f5229da55e5df2d83;p=platform%2Fupstream%2Fllvm.git

[SLP][NFC]Add a test for CSE for extractelements.
---

diff --git a/llvm/test/Transforms/SLPVectorizer/X86/cse_extractelement.ll b/llvm/test/Transforms/SLPVectorizer/X86/cse_extractelement.ll
new file mode 100644
index 0000000..e4f6ed9
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/cse_extractelement.ll
@@ -0,0 +1,59 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -slp-vectorizer -slp-vectorize-hor -slp-vectorize-hor-store -S < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+
+define void @test(i32* %ptr, i32* noalias %s)  {
+; CHECK-LABEL: @test(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32* [[PTR:%.*]], null
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP:%.*]], label [[BAIL_OUT:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i32* [[PTR]] to <4 x i32>*
+; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4
+; CHECK-NEXT:    [[TMP2:%.*]] = bitcast i32* [[S:%.*]] to <4 x i32>*
+; CHECK-NEXT:    store <4 x i32> [[TMP1]], <4 x i32>* [[TMP2]], align 4
+; CHECK-NEXT:    br label [[LOOP1:%.*]]
+; CHECK:       loop1:
+; CHECK-NEXT:    [[TMP3:%.*]] = extractelement <4 x i32> [[TMP1]], i32 0
+; CHECK-NEXT:    store i32 [[TMP3]], i32* [[S]], align 4
+; CHECK-NEXT:    br i1 true, label [[LOOP1]], label [[CONT:%.*]]
+; CHECK:       cont:
+; CHECK-NEXT:    br i1 true, label [[LOOP]], label [[BAIL_OUT]]
+; CHECK:       bail_out:
+; CHECK-NEXT:    [[DUMMY_PHI:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[TMP3]], [[CONT]] ]
+; CHECK-NEXT:    store i32 [[DUMMY_PHI]], i32* [[S]], align 4
+; CHECK-NEXT:    ret void
+;
+entry:
+  %cmp = icmp eq i32* %ptr, null
+  br i1 %cmp, label %loop, label %bail_out
+
+loop:
+  %0 = load i32, i32 * %ptr , align 4
+  %1 = getelementptr inbounds i32, i32 * %ptr, i64 1
+  %2 = load i32, i32 * %1 , align 4
+  %3 = getelementptr inbounds i32, i32 *%ptr, i64 2
+  %4 = load i32, i32 * %3 , align 4
+  %5 = getelementptr inbounds i32, i32 *%ptr, i64 3
+  %6 = load i32, i32 * %5 , align 4
+  store i32 %0, i32* %s, align 4
+  %7 = getelementptr inbounds i32, i32 * %s, i64 1
+  store i32 %2, i32* %7, align 4
+  %8 = getelementptr inbounds i32, i32 * %s, i64 2
+  store i32 %4, i32* %8, align 4
+  %9 = getelementptr inbounds i32, i32 * %s, i64 3
+  store i32 %6, i32* %9, align 4
+  br label %loop1
+
+loop1:
+  store i32 %0, i32* %s, align 4
+  br i1 true, label %loop1, label %cont
+
+cont:
+  br i1 true, label %loop, label %bail_out
+
+bail_out:
+  %dummy_phi = phi i32 [ 1, %entry ], [ %0, %cont ]
+  store i32 %dummy_phi, i32* %s, align 4
+  ret void
+}
+