From: Ilya Leoshkevich Date: Mon, 5 Nov 2018 16:34:32 +0000 (+0000) Subject: S/390: Make tests expect column numbers in RTL output X-Git-Tag: upstream/12.2.0~28340 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d64d068c6ae391ccb1502dd3bed865fe57e9f4e4;p=platform%2Fupstream%2Fgcc.git S/390: Make tests expect column numbers in RTL output RTL output now includes column numbers in addition to line numbers, like this: "gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c":16:1 This confuses some S/390 tests. gcc/testsuite/ChangeLog: 2018-11-05 Ilya Leoshkevich * gcc.target/s390/md/andc-splitter-1.c: Add colon to expectations. * gcc.target/s390/md/andc-splitter-2.c: Likewise. * gcc.target/s390/md/setmem_long-1.c: Likewise. From-SVN: r265813 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 9001057..665c049 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2018-11-05 Ilya Leoshkevich + + * gcc.target/s390/md/andc-splitter-1.c: Add colon to + expectations. + * gcc.target/s390/md/andc-splitter-2.c: Likewise. + * gcc.target/s390/md/setmem_long-1.c: Likewise. + 2018-11-05 Richard Biener PR tree-optimization/87873 diff --git a/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c b/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c index 3f0677c..36f2cfc 100644 --- a/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c +++ b/gcc/testsuite/gcc.target/s390/md/andc-splitter-1.c @@ -14,26 +14,26 @@ __attribute__ ((noinline)) unsigned long andc_vv(unsigned long a, unsigned long b) { return ~b & a; } -/* { dg-final { scan-assembler ":16 .\* \{\\*anddi3\}" } } */ -/* { dg-final { scan-assembler ":16 .\* \{\\*xordi3\}" } } */ +/* { dg-final { scan-assembler ":16:.\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":16:.\* \{\\*xordi3\}" } } */ __attribute__ ((noinline)) unsigned long andc_pv(unsigned long *a, unsigned long b) { return ~b & *a; } -/* { dg-final { scan-assembler ":22 .\* \{\\*anddi3\}" } } */ -/* { dg-final { scan-assembler ":22 .\* \{\\*xordi3\}" } } */ +/* { dg-final { scan-assembler ":22:.\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":22:.\* \{\\*xordi3\}" } } */ __attribute__ ((noinline)) unsigned long andc_vp(unsigned long a, unsigned long *b) { return ~*b & a; } -/* { dg-final { scan-assembler ":28 .\* \{\\*anddi3\}" } } */ -/* { dg-final { scan-assembler ":28 .\* \{\\*xordi3\}" } } */ +/* { dg-final { scan-assembler ":28:.\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":28:.\* \{\\*xordi3\}" } } */ __attribute__ ((noinline)) unsigned long andc_pp(unsigned long *a, unsigned long *b) { return ~*b & *a; } -/* { dg-final { scan-assembler ":34 .\* \{\\*anddi3\}" } } */ -/* { dg-final { scan-assembler ":34 .\* \{\\*xordi3\}" } } */ +/* { dg-final { scan-assembler ":34:.\* \{\\*anddi3\}" } } */ +/* { dg-final { scan-assembler ":34:.\* \{\\*xordi3\}" } } */ /* { dg-final { scan-assembler-times "\tngr\?k\?\t" 4 } } */ /* { dg-final { scan-assembler-times "\txgr\?\t" 4 } } */ diff --git a/gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c b/gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c index 89c8ea2..75ab75b 100644 --- a/gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c +++ b/gcc/testsuite/gcc.target/s390/md/andc-splitter-2.c @@ -14,26 +14,26 @@ __attribute__ ((noinline)) unsigned int andc_vv(unsigned int a, unsigned int b) { return ~b & a; } -/* { dg-final { scan-assembler ":16 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ -/* { dg-final { scan-assembler ":16 .\* \{\\*xorsi3\}" } } */ +/* { dg-final { scan-assembler ":16:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ +/* { dg-final { scan-assembler ":16:.\* \{\\*xorsi3\}" } } */ __attribute__ ((noinline)) unsigned int andc_pv(unsigned int *a, unsigned int b) { return ~b & *a; } -/* { dg-final { scan-assembler ":22 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ -/* { dg-final { scan-assembler ":22 .\* \{\\*xorsi3\}" } } */ +/* { dg-final { scan-assembler ":22:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ +/* { dg-final { scan-assembler ":22:.\* \{\\*xorsi3\}" } } */ __attribute__ ((noinline)) unsigned int andc_vp(unsigned int a, unsigned int *b) { return ~*b & a; } -/* { dg-final { scan-assembler ":28 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ -/* { dg-final { scan-assembler ":28 .\* \{\\*xorsi3\}" } } */ +/* { dg-final { scan-assembler ":28:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ +/* { dg-final { scan-assembler ":28:.\* \{\\*xorsi3\}" } } */ __attribute__ ((noinline)) unsigned int andc_pp(unsigned int *a, unsigned int *b) { return ~*b & *a; } -/* { dg-final { scan-assembler ":34 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ -/* { dg-final { scan-assembler ":34 .\* \{\\*xorsi3\}" } } */ +/* { dg-final { scan-assembler ":34:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */ +/* { dg-final { scan-assembler ":34:.\* \{\\*xorsi3\}" } } */ /* { dg-final { scan-assembler-times "\tnr\?k\?\t" 4 } } */ /* { dg-final { scan-assembler-times "\txr\?k\?\t" 4 } } */ diff --git a/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c b/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c index dec7197..a1d1c11 100644 --- a/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c +++ b/gcc/testsuite/gcc.target/s390/md/setmem_long-1.c @@ -23,8 +23,8 @@ void test2(char *p, int c, int len) } /* Check that the right patterns are used. */ -/* { dg-final { scan-assembler-times {c"?:16 .*{[*]setmem_long_?3?1?z?}} 1 } } */ -/* { dg-final { scan-assembler-times {c"?:22 .*{[*]setmem_long_and_?3?1?z?}} 1 } } */ +/* { dg-final { scan-assembler-times {c"?:16:.*{[*]setmem_long_?3?1?z?}} 1 } } */ +/* { dg-final { scan-assembler-times {c"?:22:.*{[*]setmem_long_and_?3?1?z?}} 1 } } */ #define LEN 500 char buf[LEN + 2];