From: uros Date: Sat, 25 Nov 2006 15:05:53 +0000 (+0000) Subject: config/i386/i386.md (fpremxf4): Rename to fpremxf4_i387. X-Git-Tag: upstream/4.9.2~51860 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d605b9b23daadae9d7d5706b4d199df04a03246c;p=platform%2Fupstream%2Flinaro-gcc.git config/i386/i386.md (fpremxf4): Rename to fpremxf4_i387. (fprem1xf4): Rename to fprem1xf4_i387. (fmodsf3, fmoddf3): Macroize patterns using X87MODEF12 mode macro. Rename patterns to fmod3. Use general_operand operand constraint for operands 1 and 2. Use SSE_FLOAT_MODE_P to disable patterns for SSE math. (remaindersf3, remainderdf3): Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@119199 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 30e59fc..c0019d2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2006-11-25 Uros Bizjak + + config/i386/i386.md (fpremxf4): Rename to fpremxf4_i387. + (fprem1xf4): Rename to fprem1xf4_i387. + + (fmodsf3, fmoddf3): Macroize patterns using X87MODEF12 mode macro. + Rename patterns to fmod3. Use general_operand operand + constraint for operands 1 and 2. Use SSE_FLOAT_MODE_P to disable + patterns for SSE math. + (remaindersf3, remainderdf3): Ditto. + 2006-11-25 Joseph Myers * function.c (instantiate_virtual_regs_in_insn): Call force_reg @@ -252,7 +263,7 @@ (erase_self_graph_edge): Ditto. (add_graph_edge): Removed. (get_graph_weights): Ditto. - (allocate_graph_weights): Ditto. ( + (allocate_graph_weights): Ditto. (valid_weighted_graph_edge): Ditto (bitmap_other_than_zero_bit_set): Ditto. (int_add_graph_edge): Renamed to add_graph_edge. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index f9242fb..4caeda6 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -15549,7 +15549,7 @@ (set_attr "mode" "XF") (set_attr "athlon_decode" "direct")]) -(define_insn "sqrtxf2_i387" +(define_insn "sqrt_extendxf2_i387" [(set (match_operand:XF 0 "register_operand" "=f") (sqrt:XF (float_extend:XF @@ -15582,13 +15582,13 @@ rtx op0 = gen_reg_rtx (XFmode); rtx op1 = force_reg (mode, operands[1]); - emit_insn (gen_sqrtxf2_i387 (op0, op1)); + emit_insn (gen_sqrt_extendxf2_i387 (op0, op1)); emit_insn (gen_truncxf2_i387_noop_unspec (operands[0], op0)); DONE; } }) -(define_insn "fpremxf4" +(define_insn "fpremxf4_i387" [(set (match_operand:XF 0 "register_operand" "=f") (unspec:XF [(match_operand:XF 2 "register_operand" "0") (match_operand:XF 3 "register_operand" "1")] @@ -15603,73 +15603,49 @@ [(set_attr "type" "fpspc") (set_attr "mode" "XF")]) -(define_expand "fmodsf3" - [(use (match_operand:SF 0 "register_operand" "")) - (use (match_operand:SF 1 "register_operand" "")) - (use (match_operand:SF 2 "register_operand" ""))] - "TARGET_USE_FANCY_MATH_387 - && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)" +(define_expand "fmodxf3" + [(use (match_operand:XF 0 "register_operand" "")) + (use (match_operand:XF 1 "register_operand" "")) + (use (match_operand:XF 2 "register_operand" ""))] + "TARGET_USE_FANCY_MATH_387" { rtx label = gen_label_rtx (); - rtx op1 = gen_reg_rtx (XFmode); - rtx op2 = gen_reg_rtx (XFmode); - - emit_insn(gen_extendsfxf2 (op1, operands[1])); - emit_insn(gen_extendsfxf2 (op2, operands[2])); - emit_label (label); - emit_insn (gen_fpremxf4 (op1, op2, op1, op2)); + emit_insn (gen_fpremxf4_i387 (operands[1], operands[2], + operands[1], operands[2])); ix86_emit_fp_unordered_jump (label); - emit_insn (gen_truncxfsf2_i387_noop_unspec (operands[0], op1)); + emit_move_insn (operands[0], operands[1]); DONE; }) -(define_expand "fmoddf3" - [(use (match_operand:DF 0 "register_operand" "")) - (use (match_operand:DF 1 "register_operand" "")) - (use (match_operand:DF 2 "register_operand" ""))] +(define_expand "fmod3" + [(use (match_operand:X87MODEF12 0 "register_operand" "")) + (use (match_operand:X87MODEF12 1 "general_operand" "")) + (use (match_operand:X87MODEF12 2 "general_operand" ""))] "TARGET_USE_FANCY_MATH_387 - && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)" + && (!(SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH) + || TARGET_MIX_SSE_I387)" { rtx label = gen_label_rtx (); rtx op1 = gen_reg_rtx (XFmode); rtx op2 = gen_reg_rtx (XFmode); - emit_insn (gen_extenddfxf2 (op1, operands[1])); - emit_insn (gen_extenddfxf2 (op2, operands[2])); + emit_insn(gen_extendxf2 (op1, operands[1])); + emit_insn(gen_extendxf2 (op2, operands[2])); emit_label (label); - - emit_insn (gen_fpremxf4 (op1, op2, op1, op2)); + emit_insn (gen_fpremxf4_i387 (op1, op2, op1, op2)); ix86_emit_fp_unordered_jump (label); - emit_insn (gen_truncxfdf2_i387_noop_unspec (operands[0], op1)); - DONE; -}) - -(define_expand "fmodxf3" - [(use (match_operand:XF 0 "register_operand" "")) - (use (match_operand:XF 1 "register_operand" "")) - (use (match_operand:XF 2 "register_operand" ""))] - "TARGET_USE_FANCY_MATH_387" -{ - rtx label = gen_label_rtx (); - - emit_label (label); - - emit_insn (gen_fpremxf4 (operands[1], operands[2], - operands[1], operands[2])); - ix86_emit_fp_unordered_jump (label); - - emit_move_insn (operands[0], operands[1]); + emit_insn (gen_truncxf2_i387_noop_unspec (operands[0], op1)); DONE; }) -(define_insn "fprem1xf4" +(define_insn "fprem1xf4_i387" [(set (match_operand:XF 0 "register_operand" "=f") (unspec:XF [(match_operand:XF 2 "register_operand" "0") (match_operand:XF 3 "register_operand" "1")] @@ -15684,69 +15660,46 @@ [(set_attr "type" "fpspc") (set_attr "mode" "XF")]) -(define_expand "remaindersf3" - [(use (match_operand:SF 0 "register_operand" "")) - (use (match_operand:SF 1 "register_operand" "")) - (use (match_operand:SF 2 "register_operand" ""))] - "TARGET_USE_FANCY_MATH_387 - && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387)" +(define_expand "remainderxf3" + [(use (match_operand:XF 0 "register_operand" "")) + (use (match_operand:XF 1 "register_operand" "")) + (use (match_operand:XF 2 "register_operand" ""))] + "TARGET_USE_FANCY_MATH_387" { rtx label = gen_label_rtx (); - rtx op1 = gen_reg_rtx (XFmode); - rtx op2 = gen_reg_rtx (XFmode); - - emit_insn(gen_extendsfxf2 (op1, operands[1])); - emit_insn(gen_extendsfxf2 (op2, operands[2])); - emit_label (label); - emit_insn (gen_fprem1xf4 (op1, op2, op1, op2)); + emit_insn (gen_fprem1xf4_i387 (operands[1], operands[2], + operands[1], operands[2])); ix86_emit_fp_unordered_jump (label); - emit_insn (gen_truncxfsf2_i387_noop_unspec (operands[0], op1)); + emit_move_insn (operands[0], operands[1]); DONE; }) -(define_expand "remainderdf3" - [(use (match_operand:DF 0 "register_operand" "")) - (use (match_operand:DF 1 "register_operand" "")) - (use (match_operand:DF 2 "register_operand" ""))] +(define_expand "remainder3" + [(use (match_operand:X87MODEF12 0 "register_operand" "")) + (use (match_operand:X87MODEF12 1 "general_operand" "")) + (use (match_operand:X87MODEF12 2 "general_operand" ""))] "TARGET_USE_FANCY_MATH_387 - && (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)" + && (!(SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH) + || TARGET_MIX_SSE_I387)" { rtx label = gen_label_rtx (); rtx op1 = gen_reg_rtx (XFmode); rtx op2 = gen_reg_rtx (XFmode); - emit_insn (gen_extenddfxf2 (op1, operands[1])); - emit_insn (gen_extenddfxf2 (op2, operands[2])); - - emit_label (label); - - emit_insn (gen_fprem1xf4 (op1, op2, op1, op2)); - ix86_emit_fp_unordered_jump (label); - - emit_insn (gen_truncxfdf2_i387_noop_unspec (operands[0], op1)); - DONE; -}) - -(define_expand "remainderxf3" - [(use (match_operand:XF 0 "register_operand" "")) - (use (match_operand:XF 1 "register_operand" "")) - (use (match_operand:XF 2 "register_operand" ""))] - "TARGET_USE_FANCY_MATH_387" -{ - rtx label = gen_label_rtx (); + emit_insn(gen_extendxf2 (op1, operands[1])); + emit_insn(gen_extendxf2 (op2, operands[2])); emit_label (label); - emit_insn (gen_fprem1xf4 (operands[1], operands[2], - operands[1], operands[2])); + emit_insn (gen_fprem1xf4_i387 (op1, op2, op1, op2)); ix86_emit_fp_unordered_jump (label); - emit_move_insn (operands[0], operands[1]); + emit_insn (gen_truncxf2_i387_noop_unspec (operands[0], op1)); DONE; })