From: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Wed, 30 Jan 2013 14:59:56 +0000 (+0100)
Subject: drm/i915: don't run hsw power well code on !hsw
X-Git-Tag: v3.9-rc1~83^2~36^2~8
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d5f21e4072645d0174ed4cc7197e0e30f84f96a2;p=profile%2Fivi%2Fkernel-x86-ivi.git

drm/i915: don't run hsw power well code on !hsw

Dumps annoying noise into the dmesg:

[drm:intel_set_power_well] *ERROR* Timeout enabling power well

Reported-by: Sedat Dilek <sedat.dilek@gmail.com>
Cc: Sedat Dilek <sedat.dilek@gmail.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index bec1f9f..f024e7d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4053,6 +4053,9 @@ void intel_set_power_well(struct drm_device *dev, bool enable)
 	bool is_enabled, enable_requested;
 	uint32_t tmp;
 
+	if (!IS_HASWELL(dev))
+		return;
+
 	tmp = I915_READ(HSW_PWR_WELL_DRIVER);
 	is_enabled = tmp & HSW_PWR_WELL_STATE;
 	enable_requested = tmp & HSW_PWR_WELL_ENABLE;