From: Marek Vasut <marex@denx.de>
Date: Sat, 20 Jun 2020 12:28:25 +0000 (+0200)
Subject: cmd: mmc: Cache-align extcsd read target
X-Git-Tag: v2020.10~151^2~4
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d581076a33e7fd1f2b019a0a53eebe58d76623c1;p=platform%2Fkernel%2Fu-boot.git

cmd: mmc: Cache-align extcsd read target

The extcsd read target must be cache aligned in case the controller
uses DMA to read the extcsd register, make it so.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
---

diff --git a/cmd/mmc.c b/cmd/mmc.c
index 1c252e0..1529a3e 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -8,6 +8,7 @@
 #include <blk.h>
 #include <command.h>
 #include <console.h>
+#include <memalign.h>
 #include <mmc.h>
 #include <part.h>
 #include <sparse_format.h>
@@ -56,7 +57,8 @@ static void print_mmcinfo(struct mmc *mmc)
 	if (!IS_SD(mmc) && mmc->version >= MMC_VERSION_4_41) {
 		bool has_enh = (mmc->part_support & ENHNCD_SUPPORT) != 0;
 		bool usr_enh = has_enh && (mmc->part_attr & EXT_CSD_ENH_USR);
-		u8 wp, ext_csd[MMC_MAX_BLOCK_LEN];
+		ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
+		u8 wp;
 		int ret;
 
 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)