From: Alex Deucher <alexdeucher@gmail.com>
Date: Tue, 27 Oct 2009 16:11:09 +0000 (-0400)
Subject: drm/radeon/kms/atom: Fix DVO support
X-Git-Tag: v2.6.32-rc7~43^2~19
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d56ef9c8fd34ed29ffae27598a864b4a9a82521b;p=platform%2Fkernel%2Flinux-3.10.git

drm/radeon/kms/atom: Fix DVO support

DVO in 12 bit mode (which seems to be the most common
config) requires 2x ppll.

Fixes fdo bug 21857.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
---

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index e5a3c30..8516e1b 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -483,8 +483,14 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
 		atom_execute_table(rdev->mode_info.atom_context,
 				   index, (uint32_t *)&adjust_pll_args);
 		adjusted_clock = le16_to_cpu(adjust_pll_args.usPixelClock) * 10;
-	} else
-		adjusted_clock = mode->clock;
+	} else {
+		/* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
+		if (ASIC_IS_AVIVO(rdev) &&
+		    (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1))
+			adjusted_clock = mode->clock * 2;
+		else
+			adjusted_clock = mode->clock;
+	}
 
 	if (radeon_crtc->crtc_id == 0)
 		pll = &rdev->clock.p1pll;