From: Pat Gavlin <pagavlin@microsoft.com>
Date: Thu, 27 Jul 2017 00:39:54 +0000 (-0700)
Subject: PR feedback.
X-Git-Tag: accepted/tizen/base/20180629.140029~1083^2~56^2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d543fe9f594489aac8c42d2ef9b22a817bb37d17;p=platform%2Fupstream%2Fcoreclr.git

PR feedback.
---

diff --git a/src/jit/codegencommon.cpp b/src/jit/codegencommon.cpp
index 5caf96f..da69bd4 100644
--- a/src/jit/codegencommon.cpp
+++ b/src/jit/codegencommon.cpp
@@ -2384,11 +2384,12 @@ FOUND_AM:
         }
 
         /* Special case: constant array index (that is range-checked) */
+        CLANG_FORMAT_COMMENT_ANCHOR;
 
 #if defined(LEGACY_BACKEND)
-        // If we've already placed rv2 in a register, we were probably planning to use it in this addressing mode.
-        // Because the folding below may in fact result in no address mode (e.g. if we had "[mul * rv2 + cns]" that
-        // happens to fold to "[cns2]"), do not fold during code gen.
+        // If we've already placed rv2 in a register, we are probably being called in a context that has already
+        // presumed that an addressing mode will be created, even if rv2 is constant, and if we fold we may not find a
+        // useful addressing mode (e.g. if we had [mul * rv2 + cns] it might happen to fold to [cns2].
         if (mode == -1 && rv2->InReg())
         {
             fold = false;