From: Kenneth Graunke <kenneth@whitecape.org>
Date: Thu, 11 May 2017 07:03:05 +0000 (-0700)
Subject: i965: Always scissor on Gen4-5 instead of disabling guardband.
X-Git-Tag: upstream/18.1.0~9386
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d529d5ff16c66aee3d27252e6478f9f97bd6012d;p=platform%2Fupstream%2Fmesa.git

i965: Always scissor on Gen4-5 instead of disabling guardband.

See commit ece0e535a44c228dd994861592deb155c14740d8.  This makes
Gen4-5 follow the behavior we use on Gen6+.  It seems to have
worked out there.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
---

diff --git a/src/mesa/drivers/dri/i965/brw_clip_state.c b/src/mesa/drivers/dri/i965/brw_clip_state.c
index 5ab254d..8f22c0f 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_state.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_state.c
@@ -41,11 +41,6 @@ brw_upload_clip_unit(struct brw_context *brw)
    struct gl_context *ctx = &brw->ctx;
    struct brw_clip_unit_state *clip;
 
-   /* _NEW_BUFFERS */
-   const struct gl_framebuffer *fb = ctx->DrawBuffer;
-   const float fb_width = (float)_mesa_geometric_width(fb);
-   const float fb_height = (float)_mesa_geometric_height(fb);
-
    clip = brw_state_batch(brw, sizeof(*clip), 32, &brw->clip.state_offset);
    memset(clip, 0, sizeof(*clip));
 
@@ -104,22 +99,16 @@ brw_upload_clip_unit(struct brw_context *brw)
    clip->clip5.userclip_must_clip = 1;
 
    /* enable guardband clipping if we can */
-   if (ctx->ViewportArray[0].X == 0 &&
-       ctx->ViewportArray[0].Y == 0 &&
-       ctx->ViewportArray[0].Width == fb_width &&
-       ctx->ViewportArray[0].Height == fb_height)
-   {
-      clip->clip5.guard_band_enable = 1;
-      clip->clip6.clipper_viewport_state_ptr =
-         (brw->batch.bo->offset64 + brw->clip.vp_offset) >> 5;
-
-      /* emit clip viewport relocation */
-      brw_emit_reloc(&brw->batch,
-                     (brw->clip.state_offset +
-                      offsetof(struct brw_clip_unit_state, clip6)),
-                     brw->batch.bo, brw->clip.vp_offset,
-                     I915_GEM_DOMAIN_INSTRUCTION, 0);
-   }
+   clip->clip5.guard_band_enable = 1;
+   clip->clip6.clipper_viewport_state_ptr =
+      (brw->batch.bo->offset64 + brw->clip.vp_offset) >> 5;
+
+   /* emit clip viewport relocation */
+   brw_emit_reloc(&brw->batch,
+                  (brw->clip.state_offset +
+                   offsetof(struct brw_clip_unit_state, clip6)),
+                  brw->batch.bo, brw->clip.vp_offset,
+                  I915_GEM_DOMAIN_INSTRUCTION, 0);
 
    /* _NEW_TRANSFORM */
    if (!ctx->Transform.DepthClamp)
@@ -145,8 +134,7 @@ brw_upload_clip_unit(struct brw_context *brw)
 
 const struct brw_tracked_state brw_clip_unit = {
    .dirty = {
-      .mesa  = _NEW_BUFFERS |
-               _NEW_TRANSFORM |
+      .mesa  = _NEW_TRANSFORM |
                _NEW_VIEWPORT,
       .brw   = BRW_NEW_BATCH |
                BRW_NEW_BLORP |
diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c
index a758581..8cc81c9 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_state.c
@@ -90,9 +90,7 @@ static void upload_sf_unit( struct brw_context *brw )
 
    sf->sf5.viewport_transform = 1;
 
-   /* _NEW_SCISSOR */
-   if (ctx->Scissor.EnableFlags)
-      sf->sf6.scissor = 1;
+   sf->sf6.scissor = 1;
 
    /* _NEW_POLYGON */
    if (ctx->Polygon._FrontBit)
@@ -216,8 +214,7 @@ const struct brw_tracked_state brw_sf_unit = {
                _NEW_LINE |
                _NEW_POINT |
                _NEW_POLYGON |
-               _NEW_PROGRAM |
-               _NEW_SCISSOR,
+               _NEW_PROGRAM,
       .brw   = BRW_NEW_BATCH |
                BRW_NEW_BLORP |
                BRW_NEW_PROGRAM_CACHE |