From: Fraser Cormack Date: Thu, 30 Jun 2022 08:25:35 +0000 (+0100) Subject: [RISCV] Add a test covering a (reverted) codegen issue X-Git-Tag: upstream/15.0.7~3049 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d5213c83ffe4b7deae0bc32f6217b6c671fd0161;p=platform%2Fupstream%2Fllvm.git [RISCV] Add a test covering a (reverted) codegen issue This test checks one of problematic cases outlined in D128006, leading to the patch's reversal. I thought it best to add a test just in case this sort of optimization is attempted again in the future in some fashion. --- diff --git a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir index 6fc37f7..2c0457a 100644 --- a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir +++ b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir @@ -72,6 +72,10 @@ ret %b } + define void @vmv_v_i_different_lmuls() { + ret void + } + ; Function Attrs: nounwind readnone declare @llvm.riscv.vadd.nxv1i64.nxv1i64.i64(, , , i64) #1 @@ -405,3 +409,22 @@ body: | PseudoRET implicit $v8 ... +--- +name: vmv_v_i_different_lmuls +tracksRegLiveness: true +body: | + bb.0: + liveins: $x10, $v8, $x11 + + ; CHECK-LABEL: name: vmv_v_i_different_lmuls + ; CHECK: liveins: $x10, $v8, $x11 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 4, 89 /* e64, m2, ta, mu */, implicit-def $vl, implicit-def $vtype + ; CHECK-NEXT: [[PseudoVID_V_M2_:%[0-9]+]]:vrm2 = PseudoVID_V_M2 4, 6 /* e64 */, implicit $vl, implicit $vtype + ; CHECK-NEXT: dead $x0 = PseudoVSETVLIX0 killed $x0, 70 /* e8, mf4, ta, mu */, implicit-def $vl, implicit-def $vtype, implicit $vl + ; CHECK-NEXT: [[PseudoVMV_V_I_MF4_:%[0-9]+]]:vr = PseudoVMV_V_I_MF4 0, 4, 3 /* e8 */, implicit $vl, implicit $vtype + ; CHECK-NEXT: PseudoRET + %0:vrm2 = PseudoVID_V_M2 4, 6 + %4:vr = PseudoVMV_V_I_MF4 0, 4, 3 + PseudoRET +...