From: Valentin Longchamp Date: Tue, 3 Jun 2014 09:00:32 +0000 (+0200) Subject: i2c: mpc: insert DR read in i2c_fixup() X-Git-Tag: v3.16-rc1~82^2~5^2~2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d49019a0696b0a234d304a7b3e1e545e850f4691;p=platform%2Fkernel%2Flinux-exynos.git i2c: mpc: insert DR read in i2c_fixup() The mpc_i2c_fixup function is called when the bus is not released by a slave. The function generates 9 pulses that should lead the slave to release the bus. The sequence that generates the pulses disables/enables the I2C module that controls the blocked bus. We have found out on the P2041 SoC that this could cause the CPU to hang (for a short delay). To avoid this, this patch introduces a read to the I2CDR register between the re-enablement of the I2C module in master mode and its returning to the slave mode instead of the delay (the final delay, between the pulses is kept), as proposed in procedure from the P2041 reference manual (16.6.2.3), and the other manuals from the mpc83xx and mpc85xx families. Signed-off-by: Rainer Boschung Signed-off-by: Valentin Longchamp Signed-off-by: Wolfram Sang --- diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c index f539163..6a32aa0 100644 --- a/drivers/i2c/busses/i2c-mpc.c +++ b/drivers/i2c/busses/i2c-mpc.c @@ -115,7 +115,7 @@ static void mpc_i2c_fixup(struct mpc_i2c *i2c) for (k = 9; k; k--) { writeccr(i2c, 0); writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN); - udelay(delay_val); + readb(i2c->base + MPC_I2C_DR); writeccr(i2c, CCR_MEN); udelay(delay_val << 1); }