From: Alexander Varnin Date: Tue, 20 Nov 2012 11:02:58 +0000 (+0900) Subject: ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443 X-Git-Tag: upstream/snapshot3+hdmi~6101^2~7^2~2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d40dc9ebbbd2e53690c907a0f4d131743bb68da9;p=platform%2Fadaptation%2Frenesas_rcar%2Frenesas_kernel.git ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443 Actually, SPI channel 0 on 2443 is mapped to HS SPI controller, and to enable s3c2410-spi controller, we should power on channel 1 in PCLKCON. There is no channel 0 SPI on s3c2443, so delete its clock. Signed-off-by: Alexander Varnin Reviewed-by: Heiko Stuebner Signed-off-by: Kukjin Kim --- diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c index 7f689ce..bdaba59 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2443.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c @@ -158,12 +158,6 @@ static struct clk init_clocks_off[] = { .devname = "s3c2410-spi.0", .parent = &clk_p, .enable = s3c2443_clkcon_enable_p, - .ctrlbit = S3C2443_PCLKCON_SPI0, - }, { - .name = "spi", - .devname = "s3c2410-spi.1", - .parent = &clk_p, - .enable = s3c2443_clkcon_enable_p, .ctrlbit = S3C2443_PCLKCON_SPI1, } };