From: Inki Dae <inki.dae@samsung.com>
Date: Fri, 23 Nov 2018 01:37:11 +0000 (+0900)
Subject: ARM: dts: exynos: set g3d parent clock to dpll
X-Git-Tag: accepted/tizen/unified/20190330.030053~212
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d3e5f2b74df453bb5879d3aadb66d88266470a43;p=platform%2Fkernel%2Flinux-exynos.git

ARM: dts: exynos: set g3d parent clock to dpll

 MALI GPU device uses VPLL as its parent clock which generates
 400MHz clock so it's not enough for MALI GPU device.
 This patch changes g3d parent clock to dpll which generates
 600MHz.

Change-Id: I42f0a8c13ec8eec8e91f73ba210e3c0cbcb596d0
Signed-off-by: Inki Dae <inki.dae@samsung.com>
---

diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index 6ebd184..704594f 100644
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -422,6 +422,8 @@
 
 &mali {
 	mali-supply = <&buck4_reg>;
+	assigned-clocks = <&clock CLK_MOUT_ACLK_G3D>;
+	assigned-clock-parents = <&clock CLK_MOUT_DPLL>;
 	status = "okay";
 };