From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Wed, 7 Sep 2016 15:19:07 +0000 (+0000)
Subject: Fix typo in test - it should be masking bits0-15 not bit16
X-Git-Tag: llvmorg-4.0.0-rc1~10455
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d311311beb02b1ebc70b0dc4d32c17ff7e18c12c;p=platform%2Fupstream%2Fllvm.git

Fix typo in test - it should be masking bits0-15 not bit16

llvm-svn: 280816
---

diff --git a/llvm/test/CodeGen/X86/combine-or.ll b/llvm/test/CodeGen/X86/combine-or.ll
index 143c403..f674ddd 100644
--- a/llvm/test/CodeGen/X86/combine-or.ll
+++ b/llvm/test/CodeGen/X86/combine-or.ll
@@ -462,7 +462,7 @@ define <4 x i32> @or_zext_v4i16(<4 x i16> %a0) {
 ; CHECK-NEXT:    por {{.*}}(%rip), %xmm0
 ; CHECK-NEXT:    retq
   %1 = zext <4 x i16> %a0 to <4 x i32>
-  %2 = or <4 x i32> %1, <i32 65536, i32 65536, i32 65536, i32 65536>
+  %2 = or <4 x i32> %1, <i32 65535, i32 65535, i32 65535, i32 65535>
   ret <4 x i32> %2
 }