From: Rhys Perry Date: Fri, 2 Jul 2021 15:02:37 +0000 (+0100) Subject: radv: add radv_translate_vertex_format() X-Git-Tag: upstream/22.3.5~16700 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d1f09419b4912098088115a850a96c27e50bbf32;p=platform%2Fupstream%2Fmesa.git radv: add radv_translate_vertex_format() Signed-off-by: Rhys Perry Reviewed-by: Samuel Pitoiset Part-of: --- diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c index 6ec05aa..93eeb27 100644 --- a/src/amd/vulkan/radv_formats.c +++ b/src/amd/vulkan/radv_formats.c @@ -147,6 +147,58 @@ radv_translate_buffer_numformat(const struct util_format_description *desc, int } } +void +radv_translate_vertex_format(const struct radv_physical_device *pdevice, VkFormat format, + const struct util_format_description *desc, unsigned *dfmt, + unsigned *nfmt, bool *post_shuffle, + enum radv_vs_input_alpha_adjust *alpha_adjust) +{ + assert(desc->channel[0].type != UTIL_FORMAT_TYPE_VOID); + *nfmt = radv_translate_buffer_numformat(desc, 0); + *dfmt = radv_translate_buffer_dataformat(desc, 0); + + *alpha_adjust = ALPHA_ADJUST_NONE; + if (pdevice->rad_info.chip_class <= GFX8 && pdevice->rad_info.family != CHIP_STONEY) { + switch (format) { + case VK_FORMAT_A2R10G10B10_SNORM_PACK32: + case VK_FORMAT_A2B10G10R10_SNORM_PACK32: + *alpha_adjust = ALPHA_ADJUST_SNORM; + break; + case VK_FORMAT_A2R10G10B10_SSCALED_PACK32: + case VK_FORMAT_A2B10G10R10_SSCALED_PACK32: + *alpha_adjust = ALPHA_ADJUST_SSCALED; + break; + case VK_FORMAT_A2R10G10B10_SINT_PACK32: + case VK_FORMAT_A2B10G10R10_SINT_PACK32: + *alpha_adjust = ALPHA_ADJUST_SINT; + break; + default: + break; + } + } + + switch (format) { + case VK_FORMAT_B8G8R8A8_UNORM: + case VK_FORMAT_B8G8R8A8_SNORM: + case VK_FORMAT_B8G8R8A8_USCALED: + case VK_FORMAT_B8G8R8A8_SSCALED: + case VK_FORMAT_B8G8R8A8_UINT: + case VK_FORMAT_B8G8R8A8_SINT: + case VK_FORMAT_B8G8R8A8_SRGB: + case VK_FORMAT_A2R10G10B10_UNORM_PACK32: + case VK_FORMAT_A2R10G10B10_SNORM_PACK32: + case VK_FORMAT_A2R10G10B10_USCALED_PACK32: + case VK_FORMAT_A2R10G10B10_SSCALED_PACK32: + case VK_FORMAT_A2R10G10B10_UINT_PACK32: + case VK_FORMAT_A2R10G10B10_SINT_PACK32: + *post_shuffle = true; + break; + default: + *post_shuffle = false; + break; + } +} + uint32_t radv_translate_tex_dataformat(VkFormat format, const struct util_format_description *desc, int first_non_void) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 8cf02a5..31fd00a 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2591,7 +2591,7 @@ radv_generate_graphics_pipeline_key(const struct radv_pipeline *pipeline, unsigned location = desc->location; unsigned binding = desc->binding; unsigned num_format, data_format; - int first_non_void; + bool post_shuffle; if (binding_input_rate & (1u << binding)) { key.vs.instance_rate_inputs |= 1u << location; @@ -2599,10 +2599,9 @@ radv_generate_graphics_pipeline_key(const struct radv_pipeline *pipeline, } format_desc = vk_format_description(desc->format); - first_non_void = vk_format_get_first_non_void_channel(desc->format); - - num_format = radv_translate_buffer_numformat(format_desc, first_non_void); - data_format = radv_translate_buffer_dataformat(format_desc, first_non_void); + radv_translate_vertex_format(pipeline->device->physical_device, desc->format, format_desc, + &data_format, &num_format, &post_shuffle, + &key.vs.vertex_alpha_adjust[location]); key.vs.vertex_attribute_formats[location] = data_format | (num_format << 4); key.vs.vertex_attribute_bindings[location] = desc->binding; @@ -2639,48 +2638,8 @@ radv_generate_graphics_pipeline_key(const struct radv_pipeline *pipeline, radv_get_attrib_stride(input_state, desc->binding); } - enum radv_vs_input_alpha_adjust adjust = ALPHA_ADJUST_NONE; - if (pipeline->device->physical_device->rad_info.chip_class <= GFX8 && - pipeline->device->physical_device->rad_info.family != CHIP_STONEY) { - VkFormat format = input_state->pVertexAttributeDescriptions[i].format; - switch (format) { - case VK_FORMAT_A2R10G10B10_SNORM_PACK32: - case VK_FORMAT_A2B10G10R10_SNORM_PACK32: - adjust = ALPHA_ADJUST_SNORM; - break; - case VK_FORMAT_A2R10G10B10_SSCALED_PACK32: - case VK_FORMAT_A2B10G10R10_SSCALED_PACK32: - adjust = ALPHA_ADJUST_SSCALED; - break; - case VK_FORMAT_A2R10G10B10_SINT_PACK32: - case VK_FORMAT_A2B10G10R10_SINT_PACK32: - adjust = ALPHA_ADJUST_SINT; - break; - default: - break; - } - } - key.vs.vertex_alpha_adjust[location] = adjust; - - switch (desc->format) { - case VK_FORMAT_B8G8R8A8_UNORM: - case VK_FORMAT_B8G8R8A8_SNORM: - case VK_FORMAT_B8G8R8A8_USCALED: - case VK_FORMAT_B8G8R8A8_SSCALED: - case VK_FORMAT_B8G8R8A8_UINT: - case VK_FORMAT_B8G8R8A8_SINT: - case VK_FORMAT_B8G8R8A8_SRGB: - case VK_FORMAT_A2R10G10B10_UNORM_PACK32: - case VK_FORMAT_A2R10G10B10_SNORM_PACK32: - case VK_FORMAT_A2R10G10B10_USCALED_PACK32: - case VK_FORMAT_A2R10G10B10_SSCALED_PACK32: - case VK_FORMAT_A2R10G10B10_UINT_PACK32: - case VK_FORMAT_A2R10G10B10_SINT_PACK32: + if (post_shuffle) key.vs.vertex_post_shuffle |= 1 << location; - break; - default: - break; - } } const VkPipelineTessellationStateCreateInfo *tess = diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 8b5774c..1a64a43 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1881,6 +1881,10 @@ uint32_t radv_translate_buffer_dataformat(const struct util_format_description * uint32_t radv_translate_buffer_numformat(const struct util_format_description *desc, int first_non_void); bool radv_is_buffer_format_supported(VkFormat format, bool *scaled); +void radv_translate_vertex_format(const struct radv_physical_device *pdevice, VkFormat format, + const struct util_format_description *desc, unsigned *dfmt, + unsigned *nfmt, bool *post_shuffle, + enum radv_vs_input_alpha_adjust *alpha_adjust); uint32_t radv_translate_colorformat(VkFormat format); uint32_t radv_translate_color_numformat(VkFormat format, const struct util_format_description *desc, int first_non_void);