From: Ishizaki Kou Date: Wed, 9 May 2007 07:34:08 +0000 (+1000) Subject: [POWERPC] celleb: Fix support for multiple PCI domains X-Git-Tag: v3.12-rc1~29656^2~12 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d1af5b4ea970d8cccdacf243ae42899f3784ad85;p=kernel%2Fkernel-generic.git [POWERPC] celleb: Fix support for multiple PCI domains Celleb has multiple PCI host bridges (phbs). Previous boot logic gives non-overlapped bus IDs between PCI host bridges so you can identify PHB by bus ID. But newer boot logic gives same bus ID between PHBs (it gives bus ID 0 as root bus.) So we have to set 'phb->buid' as non-zero. Signed-off-by: Kou Ishizaki Signed-off-by: Paul Mackerras --- diff --git a/arch/powerpc/platforms/celleb/pci.c b/arch/powerpc/platforms/celleb/pci.c index d1adf34..e9ac19c 100644 --- a/arch/powerpc/platforms/celleb/pci.c +++ b/arch/powerpc/platforms/celleb/pci.c @@ -457,6 +457,7 @@ int __devinit celleb_setup_phb(struct pci_controller *phb) pr_debug("PCI: celleb_setup_phb() %s\n", name); phb_set_bus_ranges(dev, phb); + phb->buid = 1; if (strcmp(name, "epci") == 0) { phb->ops = &celleb_epci_ops;