From: Craig Topper <craig.topper@intel.com>
Date: Mon, 14 Oct 2019 01:41:04 +0000 (+0000)
Subject: [X86] Autogenerate complete checks. NFC
X-Git-Tag: llvmorg-11-init~6598
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d0bfedf8e503faceea5a6c97d4ea00194cd8cb9b;p=platform%2Fupstream%2Fllvm.git

[X86] Autogenerate complete checks. NFC

llvm-svn: 374748
---

diff --git a/llvm/test/CodeGen/X86/h-registers-0.ll b/llvm/test/CodeGen/X86/h-registers-0.ll
index dfd79f3..ae76666 100644
--- a/llvm/test/CodeGen/X86/h-registers-0.ll
+++ b/llvm/test/CodeGen/X86/h-registers-0.ll
@@ -1,5 +1,6 @@
-; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
-; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=X86-64
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64 -check-prefix=X64
+; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=X86-64 -check-prefix=X32
 ; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
 ; RUN: llc < %s -mattr=-bmi -mtriple=i686--    | FileCheck %s -check-prefix=X86-32
 
@@ -7,18 +8,36 @@
 ; of h registers yet, due to x86 encoding complications.
 
 define void @bar64(i64 inreg %x, i8* inreg %p) nounwind {
-; X86-64-LABEL: bar64:
-; X86-64: shrq $8, %rdi
-; X86-64: incb %dil
+; X64-LABEL: bar64:
+; X64:       # %bb.0:
+; X64-NEXT:    shrq $8, %rdi
+; X64-NEXT:    incb %dil
+; X64-NEXT:    movb %dil, (%rsi)
+; X64-NEXT:    retq
+;
+; X32-LABEL: bar64:
+; X32:       # %bb.0:
+; X32-NEXT:    shrq $8, %rdi
+; X32-NEXT:    incb %dil
+; X32-NEXT:    movb %dil, (%esi)
+; X32-NEXT:    retq
+;
+; WIN64-LABEL: bar64:
+; WIN64:       # %bb.0:
+; WIN64-NEXT:    shrq $8, %rcx
+; WIN64-NEXT:    incb %cl
+; WIN64-NEXT:    movb %cl, (%rdx)
+; WIN64-NEXT:    retq
+;
+; X86-32-LABEL: bar64:
+; X86-32:       # %bb.0:
+; X86-32-NEXT:    incb %ah
+; X86-32-NEXT:    movb %ah, (%ecx)
+; X86-32-NEXT:    retl
 
 ; See FIXME: on regclass GR8.
 ; It could be optimally transformed like; incb %ch; movb %ch, (%rdx)
-; WIN64-LABEL:  bar64:
-; WIN64:  shrq $8, %rcx
-; WIN64:  incb %cl
 
-; X86-32-LABEL: bar64:
-; X86-32: incb %ah
   %t0 = lshr i64 %x, 8
   %t1 = trunc i64 %t0 to i8
   %t2 = add i8 %t1, 1
@@ -27,16 +46,34 @@ define void @bar64(i64 inreg %x, i8* inreg %p) nounwind {
 }
 
 define void @bar32(i32 inreg %x, i8* inreg %p) nounwind {
-; X86-64-LABEL: bar32:
-; X86-64: shrl $8, %edi
-; X86-64: incb %dil
+; X64-LABEL: bar32:
+; X64:       # %bb.0:
+; X64-NEXT:    shrl $8, %edi
+; X64-NEXT:    incb %dil
+; X64-NEXT:    movb %dil, (%rsi)
+; X64-NEXT:    retq
+;
+; X32-LABEL: bar32:
+; X32:       # %bb.0:
+; X32-NEXT:    shrl $8, %edi
+; X32-NEXT:    incb %dil
+; X32-NEXT:    movb %dil, (%esi)
+; X32-NEXT:    retq
+;
+; WIN64-LABEL: bar32:
+; WIN64:       # %bb.0:
+; WIN64-NEXT:    shrl $8, %ecx
+; WIN64-NEXT:    incb %cl
+; WIN64-NEXT:    movb %cl, (%rdx)
+; WIN64-NEXT:    retq
+;
+; X86-32-LABEL: bar32:
+; X86-32:       # %bb.0:
+; X86-32-NEXT:    incb %ah
+; X86-32-NEXT:    movb %ah, (%edx)
+; X86-32-NEXT:    retl
 
-; WIN64-LABEL:  bar32:
-; WIN64:  shrl $8, %ecx
-; WIN64:  incb %cl
 
-; X86-32-LABEL: bar32:
-; X86-32: incb %ah
   %t0 = lshr i32 %x, 8
   %t1 = trunc i32 %t0 to i8
   %t2 = add i8 %t1, 1
@@ -45,16 +82,35 @@ define void @bar32(i32 inreg %x, i8* inreg %p) nounwind {
 }
 
 define void @bar16(i16 inreg %x, i8* inreg %p) nounwind {
-; X86-64-LABEL: bar16:
-; X86-64: shrl $8, %edi
-; X86-64: incb %dil
+; X64-LABEL: bar16:
+; X64:       # %bb.0:
+; X64-NEXT:    shrl $8, %edi
+; X64-NEXT:    incb %dil
+; X64-NEXT:    movb %dil, (%rsi)
+; X64-NEXT:    retq
+;
+; X32-LABEL: bar16:
+; X32:       # %bb.0:
+; X32-NEXT:    shrl $8, %edi
+; X32-NEXT:    incb %dil
+; X32-NEXT:    movb %dil, (%esi)
+; X32-NEXT:    retq
+;
+; WIN64-LABEL: bar16:
+; WIN64:       # %bb.0:
+; WIN64-NEXT:    # kill: def $cx killed $cx def $ecx
+; WIN64-NEXT:    shrl $8, %ecx
+; WIN64-NEXT:    incb %cl
+; WIN64-NEXT:    movb %cl, (%rdx)
+; WIN64-NEXT:    retq
+;
+; X86-32-LABEL: bar16:
+; X86-32:       # %bb.0:
+; X86-32-NEXT:    incb %ah
+; X86-32-NEXT:    movb %ah, (%edx)
+; X86-32-NEXT:    retl
 
-; WIN64-LABEL:  bar16:
-; WIN64:  shrl $8, %ecx
-; WIN64:  incb %cl
 
-; X86-32-LABEL: bar16:
-; X86-32: incb %ah
   %t0 = lshr i16 %x, 8
   %t1 = trunc i16 %t0 to i8
   %t2 = add i8 %t1, 1
@@ -64,14 +120,23 @@ define void @bar16(i16 inreg %x, i8* inreg %p) nounwind {
 
 define i64 @qux64(i64 inreg %x) nounwind {
 ; X86-64-LABEL: qux64:
-; X86-64: movq %rdi, %rax
-; X86-64: movzbl %ah, %eax
+; X86-64:       # %bb.0:
+; X86-64-NEXT:    movq %rdi, %rax
+; X86-64-NEXT:    movzbl %ah, %eax
+; X86-64-NEXT:    retq
+;
+; WIN64-LABEL: qux64:
+; WIN64:       # %bb.0:
+; WIN64-NEXT:    movzbl %ch, %eax
+; WIN64-NEXT:    retq
+;
+; X86-32-LABEL: qux64:
+; X86-32:       # %bb.0:
+; X86-32-NEXT:    movzbl %ah, %eax
+; X86-32-NEXT:    xorl %edx, %edx
+; X86-32-NEXT:    retl
 
-; WIN64-LABEL:  qux64:
-; WIN64:  movzbl %ch, %eax
 
-; X86-32-LABEL: qux64:
-; X86-32: movzbl %ah, %eax
   %t0 = lshr i64 %x, 8
   %t1 = and i64 %t0, 255
   ret i64 %t1
@@ -79,14 +144,22 @@ define i64 @qux64(i64 inreg %x) nounwind {
 
 define i32 @qux32(i32 inreg %x) nounwind {
 ; X86-64-LABEL: qux32:
-; X86-64: movl %edi, %eax
-; X86-64: movzbl %ah, %eax
+; X86-64:       # %bb.0:
+; X86-64-NEXT:    movl %edi, %eax
+; X86-64-NEXT:    movzbl %ah, %eax
+; X86-64-NEXT:    retq
+;
+; WIN64-LABEL: qux32:
+; WIN64:       # %bb.0:
+; WIN64-NEXT:    movzbl %ch, %eax
+; WIN64-NEXT:    retq
+;
+; X86-32-LABEL: qux32:
+; X86-32:       # %bb.0:
+; X86-32-NEXT:    movzbl %ah, %eax
+; X86-32-NEXT:    retl
 
-; WIN64-LABEL:  qux32:
-; WIN64:  movzbl %ch, %eax
 
-; X86-32-LABEL: qux32:
-; X86-32: movzbl %ah, %eax
   %t0 = lshr i32 %x, 8
   %t1 = and i32 %t0, 255
   ret i32 %t1
@@ -94,15 +167,26 @@ define i32 @qux32(i32 inreg %x) nounwind {
 
 define i16 @qux16(i16 inreg %x) nounwind {
 ; X86-64-LABEL: qux16:
-; X86-64: movl %edi, %eax
-; X86-64: movzbl %ah, %eax
+; X86-64:       # %bb.0:
+; X86-64-NEXT:    movl %edi, %eax
+; X86-64-NEXT:    movzbl %ah, %eax
+; X86-64-NEXT:    # kill: def $ax killed $ax killed $eax
+; X86-64-NEXT:    retq
+;
+; WIN64-LABEL: qux16:
+; WIN64:       # %bb.0:
+; WIN64-NEXT:    movzwl %cx, %eax
+; WIN64-NEXT:    shrl $8, %eax
+; WIN64-NEXT:    # kill: def $ax killed $ax killed $eax
+; WIN64-NEXT:    retq
+;
+; X86-32-LABEL: qux16:
+; X86-32:       # %bb.0:
+; X86-32-NEXT:    movzbl %ah, %eax
+; X86-32-NEXT:    # kill: def $ax killed $ax killed $eax
+; X86-32-NEXT:    retl
 
-; WIN64-LABEL:  qux16:
-; WIN64:  movzwl  %cx, %eax
-; WIN64:  shrl    $8, %eax
 
-; X86-32-LABEL: qux16:
-; X86-32: movzbl %ah, %eax
   %t0 = lshr i16 %x, 8
   ret i16 %t0
 }
diff --git a/llvm/test/CodeGen/X86/h-registers-3.ll b/llvm/test/CodeGen/X86/h-registers-3.ll
index 819f216..564b1e8 100644
--- a/llvm/test/CodeGen/X86/h-registers-3.ll
+++ b/llvm/test/CodeGen/X86/h-registers-3.ll
@@ -1,35 +1,46 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686-unknown-linux-gnu   | FileCheck %s -check-prefix=X86
 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s -check-prefix=X64
 ; RUN: llc < %s -mtriple=x86_64-linux-gnux32      | FileCheck %s -check-prefix=X32
 
 define zeroext i8 @foo() nounwind ssp {
+; X86-LABEL: foo:
+; X86:       # %bb.0: # %entry
+; X86-NEXT:    subl $12, %esp
+; X86-NEXT:    calll bar
+; X86-NEXT:    movb %ah, %al
+; X86-NEXT:    addl $12, %esp
+; X86-NEXT:    retl
+;
+; X64-LABEL: foo:
+; X64:       # %bb.0: # %entry
+; X64-NEXT:    pushq %rax
+; X64-NEXT:    xorl %eax, %eax
+; X64-NEXT:    callq bar
+; X64-NEXT:    # kill: def $ax killed $ax def $eax
+; X64-NEXT:    shrl $8, %eax
+; X64-NEXT:    # kill: def $al killed $al killed $eax
+; X64-NEXT:    popq %rcx
+; X64-NEXT:    retq
+;
+; X32-LABEL: foo:
+; X32:       # %bb.0: # %entry
+; X32-NEXT:    pushq %rax
+; X32-NEXT:    xorl %eax, %eax
+; X32-NEXT:    callq bar
+; X32-NEXT:    # kill: def $ax killed $ax def $eax
+; X32-NEXT:    shrl $8, %eax
+; X32-NEXT:    # kill: def $al killed $al killed $eax
+; X32-NEXT:    popq %rcx
+; X32-NEXT:    retq
 entry:
   %0 = tail call zeroext i16 (...) @bar() nounwind
   %1 = lshr i16 %0, 8
   %2 = trunc i16 %1 to i8
   ret i8 %2
 
-; X86-LABEL: foo
-; X86: calll
-; X86-NEXT: movb %ah, %al
-; X86-NEXT: addl $12, %esp
-; X86-NEXT: retl
 
-; X64-LABEL: foo
-; X64: callq
-; X64-NEXT: # kill
-; X64-NEXT: shrl $8, %eax
-; X64-NEXT: # kill
-; X64-NEXT: popq
-; X64-NEXT: retq
 
-; X32-LABEL: foo
-; X32: callq
-; X32-NEXT: # kill
-; X32-NEXT: shrl $8, %eax
-; X32-NEXT: # kill
-; X32-NEXT: popq
-; X32-NEXT: retq
 }
 
 declare zeroext i16 @bar(...)