From: Peter Maydell <peter.maydell@linaro.org>
Date: Tue, 25 Aug 2015 14:45:08 +0000 (+0100)
Subject: target-arm: there is no TTBR1 for 32-bit EL2 stage 1 translations
X-Git-Tag: TizenStudio_2.0_p2.3.2~120^2~1^2~230^2~10
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d0a2cbceb2aa20d64d53e1c20c7d26a78ade8382;p=sdk%2Femulator%2Fqemu.git

target-arm: there is no TTBR1 for 32-bit EL2 stage 1 translations

For EL2 stage 1 translations, there is no TTBR1. We were already
handling this for 64-bit EL2; add the code to take the 'no TTBR1'
code path for 64-bit EL2 as well.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1437751263-21913-2-git-send-email-peter.maydell@linaro.org
---

diff --git a/target-arm/helper.c b/target-arm/helper.c
index 97ca86a..86d0baf 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -5999,6 +5999,11 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
         if (el > 1) {
             ttbr1_valid = false;
         }
+    } else {
+        /* There is no TTBR1 for EL2 */
+        if (el == 2) {
+            ttbr1_valid = false;
+        }
     }
 
     /* Determine whether this address is in the region controlled by