From: law <law@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Fri, 15 Oct 1999 05:57:07 +0000 (+0000)
Subject:         * pa.md (post_stw+1): Use pmode_register_operand.
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d0a131283e4d9660416a899096ce9cb1dba25f29;p=platform%2Fupstream%2Flinaro-gcc.git

    * pa.md (post_stw+1): Use pmode_register_operand.
        (dcacheflush, icacheflush): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@30003 138bc75d-0d04-0410-961f-82ee72b054a4
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2f91e05..8a5b9a6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -10,6 +10,9 @@ Fri Oct 15 18:36:07 1999  Michael Hayes  <m.hayes@elec.canterbury.ac.nz>
 	
 Thu Oct 14 22:14:23 1999  Richard Henderson  <rth@cygnus.com>
 
+	* pa.md (post_stw+1): Use pmode_register_operand.
+	(dcacheflush, icacheflush): Likewise.
+
 	* i386.md (movstricthi_1): Allow r/r.
 
 Thu Oct 14 19:44:08 1999  Jan Hubicka  <hubicka@freesoft.cz>
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 4e18383..ae7a114 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -1572,7 +1572,7 @@
 ;; Note since this pattern can be created at reload time (via movsi), all
 ;; the same rules for movsi apply here.  (no new pseudos, no temporaries).
 (define_insn ""
-  [(set (match_operand 0 "register_operand" "=a")
+  [(set (match_operand 0 "pmode_register_operand" "=a")
 	(match_operand 1 "pic_label_operand" ""))]
   ""
   "*
@@ -5608,8 +5608,8 @@
 
 (define_insn "dcacheflush"
   [(unspec_volatile [(const_int 1)] 0)
-   (use (mem:SI (match_operand 0 "register_operand" "r")))
-   (use (mem:SI (match_operand 1 "register_operand" "r")))]
+   (use (mem:SI (match_operand 0 "pmode_register_operand" "r")))
+   (use (mem:SI (match_operand 1 "pmode_register_operand" "r")))]
   ""
   "fdc 0(%0)\;fdc 0(%1)\;sync"
   [(set_attr "type" "multi")
@@ -5617,11 +5617,11 @@
 
 (define_insn "icacheflush"
   [(unspec_volatile [(const_int 2)] 0)
-   (use (mem:SI (match_operand 0 "register_operand" "r")))
-   (use (mem:SI (match_operand 1 "register_operand" "r")))
-   (use (match_operand 2 "register_operand" "r"))
-   (clobber (match_operand 3 "register_operand" "=&r"))
-   (clobber (match_operand 4 "register_operand" "=&r"))]
+   (use (mem:SI (match_operand 0 "pmode_register_operand" "r")))
+   (use (mem:SI (match_operand 1 "pmode_register_operand" "r")))
+   (use (match_operand 2 "pmode_register_operand" "r"))
+   (clobber (match_operand 3 "pmode_register_operand" "=&r"))
+   (clobber (match_operand 4 "pmode_register_operand" "=&r"))]
   ""
   "mfsp %%sr0,%4\;ldsid (%2),%3\;mtsp %3,%%sr0\;fic 0(%%sr0,%0)\;fic 0(%%sr0,%1)\;sync\;mtsp %4,%%sr0\;nop\;nop\;nop\;nop\;nop\;nop"
   [(set_attr "type" "multi")
@@ -5856,5 +5856,3 @@
   emit_insn (gen_blockage ());
   DONE;
 }")
-
-