From: H Hartley Sweeten Date: Fri, 13 Nov 2015 18:11:23 +0000 (-0700) Subject: staging: comedi: adv_pci1710: fix counter 0 internal clock source X-Git-Tag: v5.15~14427^2~208 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d0445303f86c6ace7dcaf6d2806445ea0208f151;p=platform%2Fkernel%2Flinux-starfive.git staging: comedi: adv_pci1710: fix counter 0 internal clock source There are a number of descrepencies in the various manuals for the boards that this driver supports. Some show a 10 MHz clock for counters 1 and 2 others show a 1 MHz clock. Counter 0 can use either a div 10 of that clock or an external clock (up to 10 MHz). Currently this driver initializes counters 1 and 2 with a 10 MHz clock. For consistency, return 1 MHz (10 MHz/10) for counter 0 when the user queries the internal clock source with INSN_CONFIG_GET_CLOCK_SRC. Signed-off-by: H Hartley Sweeten Reviewed-by: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/comedi/drivers/adv_pci1710.c b/drivers/staging/comedi/drivers/adv_pci1710.c index 8bd9edf..5f1e86e 100644 --- a/drivers/staging/comedi/drivers/adv_pci1710.c +++ b/drivers/staging/comedi/drivers/adv_pci1710.c @@ -701,7 +701,7 @@ static int pci1710_counter_insn_config(struct comedi_device *dev, data[2] = 0; } else { data[1] = 0; - data[2] = I8254_OSC_BASE_10MHZ; + data[2] = I8254_OSC_BASE_1MHZ; } break; default: