From: Nick Clifton <nickc@redhat.com>
Date: Thu, 19 Feb 1998 19:16:54 +0000 (+0000)
Subject: Added a couple of tests.
X-Git-Tag: gdb-4_18~3280
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d03da19e360d5ad80bd2e652db4b4e0c00ed5b15;p=platform%2Fupstream%2Fbinutils.git

Added a couple of tests.
---

diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog
index d6c998f..22de6ee 100644
--- a/sim/testsuite/ChangeLog
+++ b/sim/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+Thu Feb 19 11:15:45 1998  Nick Clifton  <nickc@cygnus.com>
+
+	* sim/m32r/xor3.cgs: Test xor3 instruction.
+	* sim/m32r/xor.cgs: Test xor instruction.
+
 Tue Feb 17 12:46:05 1998  Doug Evans  <devans@seba.cygnus.com>
 
 	* config/default.exp: New file.
@@ -8,7 +13,7 @@ Tue Feb 17 12:46:05 1998  Doug Evans  <devans@seba.cygnus.com>
 	(arch): Define.
 	(RUNTEST_FOR_TARGET): Delete.
 	(RUNTEST): Fix.
-	(SCHEME,SCHEMEFLAGS,CGENDIR,CGENFLAGS,CGENFILES): Define.
+	(SCHEME,SCHEMEFLAGS,CGENDIR,CGENFLAGS): Define.
 	(check): Depend on site.exp.  Run dejagnu.
 	(site.exp): New target.
 	(cgen): New target.
diff --git a/sim/testsuite/sim/m32r/xor.cgs b/sim/testsuite/sim/m32r/xor.cgs
new file mode 100644
index 0000000..c554681
--- /dev/null
+++ b/sim/testsuite/sim/m32r/xor.cgs
@@ -0,0 +1,16 @@
+# m32r testcase for xor $dr,$sr
+# mach(): m32r m32rx
+
+	.include "testutils.inc"
+
+	start
+
+	.global xor
+xor:
+
+	mvi_h_gr  r4, 3
+	mvi_h_gr  r5, 6
+	xor       r4, r5
+	test_h_gr r4, 5
+
+	pass