From: Bruno Cardoso Lopes Date: Tue, 2 Dec 2014 14:22:34 +0000 (+0000) Subject: [LICM] Avoind store sinking if no preheader is available X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=d035fbb96f58df15964fa6f0cef0110656de678f;p=platform%2Fupstream%2Fllvm.git [LICM] Avoind store sinking if no preheader is available Load instructions are inserted into loop preheaders when sinking stores and later removed if not used by the SSA updater. Avoid sinking if the loop has no preheader and avoid crashes. This fixes one more side effect of not handling indirectbr instructions properly on LoopSimplify. llvm-svn: 223119 --- diff --git a/llvm/lib/Transforms/Scalar/LICM.cpp b/llvm/lib/Transforms/Scalar/LICM.cpp index c706248..99725b5 100644 --- a/llvm/lib/Transforms/Scalar/LICM.cpp +++ b/llvm/lib/Transforms/Scalar/LICM.cpp @@ -847,8 +847,10 @@ void LICM::PromoteAliasSet(AliasSet &AS, return; // Don't sink stores from loops without dedicated block exits. Exits // containing indirect branches are not transformed by loop simplify, - // make sure we catch that. - if (!HasDedicatedExits) + // make sure we catch that. An additional load may be generated in the + // preheader for SSA updater, so also avoid sinking when no preheader + // is available. + if (!HasDedicatedExits || !Preheader) return; // Note that we only check GuaranteedToExecute inside the store case diff --git a/llvm/test/Transforms/LICM/sinking.ll b/llvm/test/Transforms/LICM/sinking.ll index f01367b..d7a8fcd 100644 --- a/llvm/test/Transforms/LICM/sinking.ll +++ b/llvm/test/Transforms/LICM/sinking.ll @@ -359,6 +359,39 @@ lab22: indirectbr i8* undef, [label %lab5, label %lab6, label %lab7] } +; Test that we don't crash when trying to sink stores and there's no preheader +; available (which is used for creating loads that may be used by the SSA +; updater) +define void @test13() { +; CHECK-LABEL: @test13 + br label %lab59 + +lab19: + br i1 undef, label %lab20, label %lab38 + +lab20: + br label %lab60 + +lab21: + br i1 undef, label %lab22, label %lab38 + +lab22: + br label %lab38 + +lab38: + ret void + +lab59: + indirectbr i8* undef, [label %lab60, label %lab38] + +lab60: +; CHECK: lab60: +; CHECK: store +; CHECK-NEXT: indirectbr + store i32 2145244101, i32* undef, align 4 + indirectbr i8* undef, [label %lab21, label %lab19] +} + declare void @f(i32*) declare void @g()