From: Hans-Peter Nilsson <hp@axis.com>
Date: Mon, 5 Dec 2005 03:11:47 +0000 (+0000)
Subject: 	* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
X-Git-Tag: gdb-csl-20060226-branchpoint~614
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cf2bf87e2161ad7fb1a4fe4abc3e3b70bcaae4b5;p=platform%2Fupstream%2Fbinutils.git

	* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
	cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
	cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
	cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
	cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
	cris/semcrisv32f-switch.c: Regenerate.
---

diff --git a/sim/ChangeLog b/sim/ChangeLog
index fa63280..dc4a577 100644
--- a/sim/ChangeLog
+++ b/sim/ChangeLog
@@ -1,3 +1,12 @@
+2005-12-05  Hans-Peter Nilsson  <hp@axis.com>
+
+	* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
+	cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
+	cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
+	cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
+	cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
+	cris/semcrisv32f-switch.c: Regenerate.
+
 2005-11-20  Hans-Peter Nilsson  <hp@axis.com>
 
 	* cris/traps.c (TARGET_O_RDONLY, TARGET_O_WRONLY): Define.
diff --git a/sim/cris/arch.c b/sim/cris/arch.c
index b6cae99..840d8c1 100644
--- a/sim/cris/arch.c
+++ b/sim/cris/arch.c
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/arch.h b/sim/cris/arch.h
index 0c8bcc2..3619a9e 100644
--- a/sim/cris/arch.h
+++ b/sim/cris/arch.h
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/cpuall.h b/sim/cris/cpuall.h
index 0095edb..287282e 100644
--- a/sim/cris/cpuall.h
+++ b/sim/cris/cpuall.h
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/cpuv10.c b/sim/cris/cpuv10.c
index 1cfbb0b..c235f2a 100644
--- a/sim/cris/cpuv10.c
+++ b/sim/cris/cpuv10.c
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/cpuv10.h b/sim/cris/cpuv10.h
index 96d76b8..52c1b74 100644
--- a/sim/cris/cpuv10.h
+++ b/sim/cris/cpuv10.h
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -604,9 +604,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MOVECBR_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)); \
+  f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
@@ -624,9 +624,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MOVECWR_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)); \
+  f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
@@ -664,9 +664,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MOVUCBR_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)); \
+  f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
@@ -684,9 +684,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MOVUCWR_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)); \
+  f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
@@ -796,9 +796,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MOVE_C_SPRV10_P0_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)); \
+  f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
@@ -816,9 +816,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MOVE_C_SPRV10_P4_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)); \
+  f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
@@ -983,9 +983,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_BCC_W_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_NON_V32 ()) ? (0) : (4)))))); \
+  f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_NON_V32 ()) ? (0) : (4)))))); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
@@ -1003,9 +1003,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_BA_W_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_NON_V32 ()) ? (0) : (4)))))); \
+  f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_NON_V32 ()) ? (0) : (4)))))); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
diff --git a/sim/cris/cpuv32.c b/sim/cris/cpuv32.c
index fe043c8..9c5b777d 100644
--- a/sim/cris/cpuv32.c
+++ b/sim/cris/cpuv32.c
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/cpuv32.h b/sim/cris/cpuv32.h
index 9db2228..93c9425 100644
--- a/sim/cris/cpuv32.h
+++ b/sim/cris/cpuv32.h
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -717,9 +717,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MOVECBR_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)); \
+  f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
@@ -737,9 +737,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MOVECWR_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)); \
+  f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
@@ -777,9 +777,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MOVUCBR_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)); \
+  f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
@@ -797,9 +797,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_MOVUCWR_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)); \
+  f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
@@ -1121,9 +1121,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_BCC_W_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_V32 ()) ? (0) : (4)))))); \
+  f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_V32 ()) ? (0) : (4)))))); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
@@ -1141,9 +1141,9 @@ struct scache {
   unsigned int length;
 #define EXTRACT_IFMT_BA_W_CODE \
   length = 4; \
-  word_1 = GETIMEMUHI (current_cpu, pc + 2); \
+  word_1 = GETIMEMUSI (current_cpu, pc + 2); \
   f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4); \
-  f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_V32 ()) ? (0) : (4)))))); \
+  f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_V32 ()) ? (0) : (4)))))); \
   f_mode = EXTRACT_LSB0_UINT (insn, 16, 11, 2); \
   f_opcode = EXTRACT_LSB0_UINT (insn, 16, 9, 4); \
   f_size = EXTRACT_LSB0_UINT (insn, 16, 5, 2); \
diff --git a/sim/cris/cris-desc.c b/sim/cris/cris-desc.c
index 9d073d8..e83c7c4 100644
--- a/sim/cris/cris-desc.c
+++ b/sim/cris/cris-desc.c
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -134,23 +134,23 @@ static const CGEN_MACH cris_cgen_mach_table[] = {
 
 static CGEN_KEYWORD_ENTRY cris_cgen_opval_gr_names_pcreg_entries[] =
 {
-  { "PC", 15, {0, {0}}, 0, 0 },
-  { "SP", 14, {0, {0}}, 0, 0 },
-  { "R0", 0, {0, {0}}, 0, 0 },
-  { "R1", 1, {0, {0}}, 0, 0 },
-  { "R2", 2, {0, {0}}, 0, 0 },
-  { "R3", 3, {0, {0}}, 0, 0 },
-  { "R4", 4, {0, {0}}, 0, 0 },
-  { "R5", 5, {0, {0}}, 0, 0 },
-  { "R6", 6, {0, {0}}, 0, 0 },
-  { "R7", 7, {0, {0}}, 0, 0 },
-  { "R8", 8, {0, {0}}, 0, 0 },
-  { "R9", 9, {0, {0}}, 0, 0 },
-  { "R10", 10, {0, {0}}, 0, 0 },
-  { "R11", 11, {0, {0}}, 0, 0 },
-  { "R12", 12, {0, {0}}, 0, 0 },
-  { "R13", 13, {0, {0}}, 0, 0 },
-  { "R14", 14, {0, {0}}, 0, 0 }
+  { "PC", 15, {0, {{{0, 0}}}}, 0, 0 },
+  { "SP", 14, {0, {{{0, 0}}}}, 0, 0 },
+  { "R0", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "R1", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "R2", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "R3", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "R4", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "R5", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "R6", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "R7", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "R8", 8, {0, {{{0, 0}}}}, 0, 0 },
+  { "R9", 9, {0, {{{0, 0}}}}, 0, 0 },
+  { "R10", 10, {0, {{{0, 0}}}}, 0, 0 },
+  { "R11", 11, {0, {{{0, 0}}}}, 0, 0 },
+  { "R12", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "R13", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "R14", 14, {0, {{{0, 0}}}}, 0, 0 }
 };
 
 CGEN_KEYWORD cris_cgen_opval_gr_names_pcreg =
@@ -162,23 +162,23 @@ CGEN_KEYWORD cris_cgen_opval_gr_names_pcreg =
 
 static CGEN_KEYWORD_ENTRY cris_cgen_opval_gr_names_acr_entries[] =
 {
-  { "ACR", 15, {0, {0}}, 0, 0 },
-  { "SP", 14, {0, {0}}, 0, 0 },
-  { "R0", 0, {0, {0}}, 0, 0 },
-  { "R1", 1, {0, {0}}, 0, 0 },
-  { "R2", 2, {0, {0}}, 0, 0 },
-  { "R3", 3, {0, {0}}, 0, 0 },
-  { "R4", 4, {0, {0}}, 0, 0 },
-  { "R5", 5, {0, {0}}, 0, 0 },
-  { "R6", 6, {0, {0}}, 0, 0 },
-  { "R7", 7, {0, {0}}, 0, 0 },
-  { "R8", 8, {0, {0}}, 0, 0 },
-  { "R9", 9, {0, {0}}, 0, 0 },
-  { "R10", 10, {0, {0}}, 0, 0 },
-  { "R11", 11, {0, {0}}, 0, 0 },
-  { "R12", 12, {0, {0}}, 0, 0 },
-  { "R13", 13, {0, {0}}, 0, 0 },
-  { "R14", 14, {0, {0}}, 0, 0 }
+  { "ACR", 15, {0, {{{0, 0}}}}, 0, 0 },
+  { "SP", 14, {0, {{{0, 0}}}}, 0, 0 },
+  { "R0", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "R1", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "R2", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "R3", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "R4", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "R5", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "R6", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "R7", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "R8", 8, {0, {{{0, 0}}}}, 0, 0 },
+  { "R9", 9, {0, {{{0, 0}}}}, 0, 0 },
+  { "R10", 10, {0, {{{0, 0}}}}, 0, 0 },
+  { "R11", 11, {0, {{{0, 0}}}}, 0, 0 },
+  { "R12", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "R13", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "R14", 14, {0, {{{0, 0}}}}, 0, 0 }
 };
 
 CGEN_KEYWORD cris_cgen_opval_gr_names_acr =
@@ -190,23 +190,23 @@ CGEN_KEYWORD cris_cgen_opval_gr_names_acr =
 
 static CGEN_KEYWORD_ENTRY cris_cgen_opval_gr_names_v32_entries[] =
 {
-  { "ACR", 15, {0, {0}}, 0, 0 },
-  { "SP", 14, {0, {0}}, 0, 0 },
-  { "R0", 0, {0, {0}}, 0, 0 },
-  { "R1", 1, {0, {0}}, 0, 0 },
-  { "R2", 2, {0, {0}}, 0, 0 },
-  { "R3", 3, {0, {0}}, 0, 0 },
-  { "R4", 4, {0, {0}}, 0, 0 },
-  { "R5", 5, {0, {0}}, 0, 0 },
-  { "R6", 6, {0, {0}}, 0, 0 },
-  { "R7", 7, {0, {0}}, 0, 0 },
-  { "R8", 8, {0, {0}}, 0, 0 },
-  { "R9", 9, {0, {0}}, 0, 0 },
-  { "R10", 10, {0, {0}}, 0, 0 },
-  { "R11", 11, {0, {0}}, 0, 0 },
-  { "R12", 12, {0, {0}}, 0, 0 },
-  { "R13", 13, {0, {0}}, 0, 0 },
-  { "R14", 14, {0, {0}}, 0, 0 }
+  { "ACR", 15, {0, {{{0, 0}}}}, 0, 0 },
+  { "SP", 14, {0, {{{0, 0}}}}, 0, 0 },
+  { "R0", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "R1", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "R2", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "R3", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "R4", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "R5", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "R6", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "R7", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "R8", 8, {0, {{{0, 0}}}}, 0, 0 },
+  { "R9", 9, {0, {{{0, 0}}}}, 0, 0 },
+  { "R10", 10, {0, {{{0, 0}}}}, 0, 0 },
+  { "R11", 11, {0, {{{0, 0}}}}, 0, 0 },
+  { "R12", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "R13", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "R14", 14, {0, {{{0, 0}}}}, 0, 0 }
 };
 
 CGEN_KEYWORD cris_cgen_opval_gr_names_v32 =
@@ -218,31 +218,31 @@ CGEN_KEYWORD cris_cgen_opval_gr_names_v32 =
 
 static CGEN_KEYWORD_ENTRY cris_cgen_opval_p_names_v10_entries[] =
 {
-  { "CCR", 5, {0, {0}}, 0, 0 },
-  { "MOF", 7, {0, {0}}, 0, 0 },
-  { "IBR", 9, {0, {0}}, 0, 0 },
-  { "IRP", 10, {0, {0}}, 0, 0 },
-  { "BAR", 12, {0, {0}}, 0, 0 },
-  { "DCCR", 13, {0, {0}}, 0, 0 },
-  { "BRP", 14, {0, {0}}, 0, 0 },
-  { "USP", 15, {0, {0}}, 0, 0 },
-  { "VR", 1, {0, {0}}, 0, 0 },
-  { "SRP", 11, {0, {0}}, 0, 0 },
-  { "P0", 0, {0, {0}}, 0, 0 },
-  { "P1", 1, {0, {0}}, 0, 0 },
-  { "P2", 2, {0, {0}}, 0, 0 },
-  { "P3", 3, {0, {0}}, 0, 0 },
-  { "P4", 4, {0, {0}}, 0, 0 },
-  { "P5", 5, {0, {0}}, 0, 0 },
-  { "P6", 6, {0, {0}}, 0, 0 },
-  { "P7", 7, {0, {0}}, 0, 0 },
-  { "P8", 8, {0, {0}}, 0, 0 },
-  { "P9", 9, {0, {0}}, 0, 0 },
-  { "P10", 10, {0, {0}}, 0, 0 },
-  { "P11", 11, {0, {0}}, 0, 0 },
-  { "P12", 12, {0, {0}}, 0, 0 },
-  { "P13", 13, {0, {0}}, 0, 0 },
-  { "P14", 14, {0, {0}}, 0, 0 }
+  { "CCR", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "MOF", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "IBR", 9, {0, {{{0, 0}}}}, 0, 0 },
+  { "IRP", 10, {0, {{{0, 0}}}}, 0, 0 },
+  { "BAR", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "DCCR", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "BRP", 14, {0, {{{0, 0}}}}, 0, 0 },
+  { "USP", 15, {0, {{{0, 0}}}}, 0, 0 },
+  { "VR", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "SRP", 11, {0, {{{0, 0}}}}, 0, 0 },
+  { "P0", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "P1", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "P2", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "P3", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "P4", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "P5", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "P6", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "P7", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "P8", 8, {0, {{{0, 0}}}}, 0, 0 },
+  { "P9", 9, {0, {{{0, 0}}}}, 0, 0 },
+  { "P10", 10, {0, {{{0, 0}}}}, 0, 0 },
+  { "P11", 11, {0, {{{0, 0}}}}, 0, 0 },
+  { "P12", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "P13", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "P14", 14, {0, {{{0, 0}}}}, 0, 0 }
 };
 
 CGEN_KEYWORD cris_cgen_opval_p_names_v10 =
@@ -254,37 +254,37 @@ CGEN_KEYWORD cris_cgen_opval_p_names_v10 =
 
 static CGEN_KEYWORD_ENTRY cris_cgen_opval_p_names_v32_entries[] =
 {
-  { "BZ", 0, {0, {0}}, 0, 0 },
-  { "PID", 2, {0, {0}}, 0, 0 },
-  { "SRS", 3, {0, {0}}, 0, 0 },
-  { "WZ", 4, {0, {0}}, 0, 0 },
-  { "EXS", 5, {0, {0}}, 0, 0 },
-  { "EDA", 6, {0, {0}}, 0, 0 },
-  { "MOF", 7, {0, {0}}, 0, 0 },
-  { "DZ", 8, {0, {0}}, 0, 0 },
-  { "EBP", 9, {0, {0}}, 0, 0 },
-  { "ERP", 10, {0, {0}}, 0, 0 },
-  { "NRP", 12, {0, {0}}, 0, 0 },
-  { "CCS", 13, {0, {0}}, 0, 0 },
-  { "USP", 14, {0, {0}}, 0, 0 },
-  { "SPC", 15, {0, {0}}, 0, 0 },
-  { "VR", 1, {0, {0}}, 0, 0 },
-  { "SRP", 11, {0, {0}}, 0, 0 },
-  { "P0", 0, {0, {0}}, 0, 0 },
-  { "P1", 1, {0, {0}}, 0, 0 },
-  { "P2", 2, {0, {0}}, 0, 0 },
-  { "P3", 3, {0, {0}}, 0, 0 },
-  { "P4", 4, {0, {0}}, 0, 0 },
-  { "P5", 5, {0, {0}}, 0, 0 },
-  { "P6", 6, {0, {0}}, 0, 0 },
-  { "P7", 7, {0, {0}}, 0, 0 },
-  { "P8", 8, {0, {0}}, 0, 0 },
-  { "P9", 9, {0, {0}}, 0, 0 },
-  { "P10", 10, {0, {0}}, 0, 0 },
-  { "P11", 11, {0, {0}}, 0, 0 },
-  { "P12", 12, {0, {0}}, 0, 0 },
-  { "P13", 13, {0, {0}}, 0, 0 },
-  { "P14", 14, {0, {0}}, 0, 0 }
+  { "BZ", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "PID", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "SRS", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "WZ", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "EXS", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "EDA", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "MOF", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "DZ", 8, {0, {{{0, 0}}}}, 0, 0 },
+  { "EBP", 9, {0, {{{0, 0}}}}, 0, 0 },
+  { "ERP", 10, {0, {{{0, 0}}}}, 0, 0 },
+  { "NRP", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "CCS", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "USP", 14, {0, {{{0, 0}}}}, 0, 0 },
+  { "SPC", 15, {0, {{{0, 0}}}}, 0, 0 },
+  { "VR", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "SRP", 11, {0, {{{0, 0}}}}, 0, 0 },
+  { "P0", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "P1", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "P2", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "P3", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "P4", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "P5", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "P6", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "P7", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "P8", 8, {0, {{{0, 0}}}}, 0, 0 },
+  { "P9", 9, {0, {{{0, 0}}}}, 0, 0 },
+  { "P10", 10, {0, {{{0, 0}}}}, 0, 0 },
+  { "P11", 11, {0, {{{0, 0}}}}, 0, 0 },
+  { "P12", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "P13", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "P14", 14, {0, {{{0, 0}}}}, 0, 0 }
 };
 
 CGEN_KEYWORD cris_cgen_opval_p_names_v32 =
@@ -296,37 +296,37 @@ CGEN_KEYWORD cris_cgen_opval_p_names_v32 =
 
 static CGEN_KEYWORD_ENTRY cris_cgen_opval_p_names_v32_x_entries[] =
 {
-  { "BZ", 0, {0, {0}}, 0, 0 },
-  { "PID", 2, {0, {0}}, 0, 0 },
-  { "SRS", 3, {0, {0}}, 0, 0 },
-  { "WZ", 4, {0, {0}}, 0, 0 },
-  { "EXS", 5, {0, {0}}, 0, 0 },
-  { "EDA", 6, {0, {0}}, 0, 0 },
-  { "MOF", 7, {0, {0}}, 0, 0 },
-  { "DZ", 8, {0, {0}}, 0, 0 },
-  { "EBP", 9, {0, {0}}, 0, 0 },
-  { "ERP", 10, {0, {0}}, 0, 0 },
-  { "NRP", 12, {0, {0}}, 0, 0 },
-  { "CCS", 13, {0, {0}}, 0, 0 },
-  { "USP", 14, {0, {0}}, 0, 0 },
-  { "SPC", 15, {0, {0}}, 0, 0 },
-  { "VR", 1, {0, {0}}, 0, 0 },
-  { "SRP", 11, {0, {0}}, 0, 0 },
-  { "P0", 0, {0, {0}}, 0, 0 },
-  { "P1", 1, {0, {0}}, 0, 0 },
-  { "P2", 2, {0, {0}}, 0, 0 },
-  { "P3", 3, {0, {0}}, 0, 0 },
-  { "P4", 4, {0, {0}}, 0, 0 },
-  { "P5", 5, {0, {0}}, 0, 0 },
-  { "P6", 6, {0, {0}}, 0, 0 },
-  { "P7", 7, {0, {0}}, 0, 0 },
-  { "P8", 8, {0, {0}}, 0, 0 },
-  { "P9", 9, {0, {0}}, 0, 0 },
-  { "P10", 10, {0, {0}}, 0, 0 },
-  { "P11", 11, {0, {0}}, 0, 0 },
-  { "P12", 12, {0, {0}}, 0, 0 },
-  { "P13", 13, {0, {0}}, 0, 0 },
-  { "P14", 14, {0, {0}}, 0, 0 }
+  { "BZ", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "PID", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "SRS", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "WZ", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "EXS", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "EDA", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "MOF", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "DZ", 8, {0, {{{0, 0}}}}, 0, 0 },
+  { "EBP", 9, {0, {{{0, 0}}}}, 0, 0 },
+  { "ERP", 10, {0, {{{0, 0}}}}, 0, 0 },
+  { "NRP", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "CCS", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "USP", 14, {0, {{{0, 0}}}}, 0, 0 },
+  { "SPC", 15, {0, {{{0, 0}}}}, 0, 0 },
+  { "VR", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "SRP", 11, {0, {{{0, 0}}}}, 0, 0 },
+  { "P0", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "P1", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "P2", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "P3", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "P4", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "P5", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "P6", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "P7", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "P8", 8, {0, {{{0, 0}}}}, 0, 0 },
+  { "P9", 9, {0, {{{0, 0}}}}, 0, 0 },
+  { "P10", 10, {0, {{{0, 0}}}}, 0, 0 },
+  { "P11", 11, {0, {{{0, 0}}}}, 0, 0 },
+  { "P12", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "P13", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "P14", 14, {0, {{{0, 0}}}}, 0, 0 }
 };
 
 CGEN_KEYWORD cris_cgen_opval_p_names_v32_x =
@@ -338,8 +338,8 @@ CGEN_KEYWORD cris_cgen_opval_p_names_v32_x =
 
 static CGEN_KEYWORD_ENTRY cris_cgen_opval_h_inc_entries[] =
 {
-  { "", 0, {0, {0}}, 0, 0 },
-  { "+", 1, {0, {0}}, 0, 0 }
+  { "", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "+", 1, {0, {{{0, 0}}}}, 0, 0 }
 };
 
 CGEN_KEYWORD cris_cgen_opval_h_inc =
@@ -351,22 +351,22 @@ CGEN_KEYWORD cris_cgen_opval_h_inc =
 
 static CGEN_KEYWORD_ENTRY cris_cgen_opval_h_ccode_entries[] =
 {
-  { "cc", 0, {0, {0}}, 0, 0 },
-  { "cs", 1, {0, {0}}, 0, 0 },
-  { "ne", 2, {0, {0}}, 0, 0 },
-  { "eq", 3, {0, {0}}, 0, 0 },
-  { "vc", 4, {0, {0}}, 0, 0 },
-  { "vs", 5, {0, {0}}, 0, 0 },
-  { "pl", 6, {0, {0}}, 0, 0 },
-  { "mi", 7, {0, {0}}, 0, 0 },
-  { "ls", 8, {0, {0}}, 0, 0 },
-  { "hi", 9, {0, {0}}, 0, 0 },
-  { "ge", 10, {0, {0}}, 0, 0 },
-  { "lt", 11, {0, {0}}, 0, 0 },
-  { "gt", 12, {0, {0}}, 0, 0 },
-  { "le", 13, {0, {0}}, 0, 0 },
-  { "a", 14, {0, {0}}, 0, 0 },
-  { "wf", 15, {0, {0}}, 0, 0 }
+  { "cc", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "cs", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "ne", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "eq", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "vc", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "vs", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "pl", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "mi", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "ls", 8, {0, {{{0, 0}}}}, 0, 0 },
+  { "hi", 9, {0, {{{0, 0}}}}, 0, 0 },
+  { "ge", 10, {0, {{{0, 0}}}}, 0, 0 },
+  { "lt", 11, {0, {{{0, 0}}}}, 0, 0 },
+  { "gt", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "le", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "a", 14, {0, {{{0, 0}}}}, 0, 0 },
+  { "wf", 15, {0, {{{0, 0}}}}, 0, 0 }
 };
 
 CGEN_KEYWORD cris_cgen_opval_h_ccode =
@@ -378,22 +378,22 @@ CGEN_KEYWORD cris_cgen_opval_h_ccode =
 
 static CGEN_KEYWORD_ENTRY cris_cgen_opval_h_swap_entries[] =
 {
-  { " ", 0, {0, {0}}, 0, 0 },
-  { "r", 1, {0, {0}}, 0, 0 },
-  { "b", 2, {0, {0}}, 0, 0 },
-  { "br", 3, {0, {0}}, 0, 0 },
-  { "w", 4, {0, {0}}, 0, 0 },
-  { "wr", 5, {0, {0}}, 0, 0 },
-  { "wb", 6, {0, {0}}, 0, 0 },
-  { "wbr", 7, {0, {0}}, 0, 0 },
-  { "n", 8, {0, {0}}, 0, 0 },
-  { "nr", 9, {0, {0}}, 0, 0 },
-  { "nb", 10, {0, {0}}, 0, 0 },
-  { "nbr", 11, {0, {0}}, 0, 0 },
-  { "nw", 12, {0, {0}}, 0, 0 },
-  { "nwr", 13, {0, {0}}, 0, 0 },
-  { "nwb", 14, {0, {0}}, 0, 0 },
-  { "nwbr", 15, {0, {0}}, 0, 0 }
+  { " ", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "r", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "b", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "br", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "w", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "wr", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "wb", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "wbr", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "n", 8, {0, {{{0, 0}}}}, 0, 0 },
+  { "nr", 9, {0, {{{0, 0}}}}, 0, 0 },
+  { "nb", 10, {0, {{{0, 0}}}}, 0, 0 },
+  { "nbr", 11, {0, {{{0, 0}}}}, 0, 0 },
+  { "nw", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "nwr", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "nwb", 14, {0, {{{0, 0}}}}, 0, 0 },
+  { "nwbr", 15, {0, {{{0, 0}}}}, 0, 0 }
 };
 
 CGEN_KEYWORD cris_cgen_opval_h_swap =
@@ -405,262 +405,262 @@ CGEN_KEYWORD cris_cgen_opval_h_swap =
 
 static CGEN_KEYWORD_ENTRY cris_cgen_opval_h_flagbits_entries[] =
 {
-  { "_", 0, {0, {0}}, 0, 0 },
-  { "c", 1, {0, {0}}, 0, 0 },
-  { "v", 2, {0, {0}}, 0, 0 },
-  { "cv", 3, {0, {0}}, 0, 0 },
-  { "z", 4, {0, {0}}, 0, 0 },
-  { "cz", 5, {0, {0}}, 0, 0 },
-  { "vz", 6, {0, {0}}, 0, 0 },
-  { "cvz", 7, {0, {0}}, 0, 0 },
-  { "n", 8, {0, {0}}, 0, 0 },
-  { "cn", 9, {0, {0}}, 0, 0 },
-  { "vn", 10, {0, {0}}, 0, 0 },
-  { "cvn", 11, {0, {0}}, 0, 0 },
-  { "zn", 12, {0, {0}}, 0, 0 },
-  { "czn", 13, {0, {0}}, 0, 0 },
-  { "vzn", 14, {0, {0}}, 0, 0 },
-  { "cvzn", 15, {0, {0}}, 0, 0 },
-  { "x", 16, {0, {0}}, 0, 0 },
-  { "cx", 17, {0, {0}}, 0, 0 },
-  { "vx", 18, {0, {0}}, 0, 0 },
-  { "cvx", 19, {0, {0}}, 0, 0 },
-  { "zx", 20, {0, {0}}, 0, 0 },
-  { "czx", 21, {0, {0}}, 0, 0 },
-  { "vzx", 22, {0, {0}}, 0, 0 },
-  { "cvzx", 23, {0, {0}}, 0, 0 },
-  { "nx", 24, {0, {0}}, 0, 0 },
-  { "cnx", 25, {0, {0}}, 0, 0 },
-  { "vnx", 26, {0, {0}}, 0, 0 },
-  { "cvnx", 27, {0, {0}}, 0, 0 },
-  { "znx", 28, {0, {0}}, 0, 0 },
-  { "cznx", 29, {0, {0}}, 0, 0 },
-  { "vznx", 30, {0, {0}}, 0, 0 },
-  { "cvznx", 31, {0, {0}}, 0, 0 },
-  { "i", 32, {0, {0}}, 0, 0 },
-  { "ci", 33, {0, {0}}, 0, 0 },
-  { "vi", 34, {0, {0}}, 0, 0 },
-  { "cvi", 35, {0, {0}}, 0, 0 },
-  { "zi", 36, {0, {0}}, 0, 0 },
-  { "czi", 37, {0, {0}}, 0, 0 },
-  { "vzi", 38, {0, {0}}, 0, 0 },
-  { "cvzi", 39, {0, {0}}, 0, 0 },
-  { "ni", 40, {0, {0}}, 0, 0 },
-  { "cni", 41, {0, {0}}, 0, 0 },
-  { "vni", 42, {0, {0}}, 0, 0 },
-  { "cvni", 43, {0, {0}}, 0, 0 },
-  { "zni", 44, {0, {0}}, 0, 0 },
-  { "czni", 45, {0, {0}}, 0, 0 },
-  { "vzni", 46, {0, {0}}, 0, 0 },
-  { "cvzni", 47, {0, {0}}, 0, 0 },
-  { "xi", 48, {0, {0}}, 0, 0 },
-  { "cxi", 49, {0, {0}}, 0, 0 },
-  { "vxi", 50, {0, {0}}, 0, 0 },
-  { "cvxi", 51, {0, {0}}, 0, 0 },
-  { "zxi", 52, {0, {0}}, 0, 0 },
-  { "czxi", 53, {0, {0}}, 0, 0 },
-  { "vzxi", 54, {0, {0}}, 0, 0 },
-  { "cvzxi", 55, {0, {0}}, 0, 0 },
-  { "nxi", 56, {0, {0}}, 0, 0 },
-  { "cnxi", 57, {0, {0}}, 0, 0 },
-  { "vnxi", 58, {0, {0}}, 0, 0 },
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+  { "nxp", 152, {0, {{{0, 0}}}}, 0, 0 },
+  { "cnxp", 153, {0, {{{0, 0}}}}, 0, 0 },
+  { "vnxp", 154, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvnxp", 155, {0, {{{0, 0}}}}, 0, 0 },
+  { "znxp", 156, {0, {{{0, 0}}}}, 0, 0 },
+  { "cznxp", 157, {0, {{{0, 0}}}}, 0, 0 },
+  { "vznxp", 158, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvznxp", 159, {0, {{{0, 0}}}}, 0, 0 },
+  { "ip", 160, {0, {{{0, 0}}}}, 0, 0 },
+  { "cip", 161, {0, {{{0, 0}}}}, 0, 0 },
+  { "vip", 162, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvip", 163, {0, {{{0, 0}}}}, 0, 0 },
+  { "zip", 164, {0, {{{0, 0}}}}, 0, 0 },
+  { "czip", 165, {0, {{{0, 0}}}}, 0, 0 },
+  { "vzip", 166, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvzip", 167, {0, {{{0, 0}}}}, 0, 0 },
+  { "nip", 168, {0, {{{0, 0}}}}, 0, 0 },
+  { "cnip", 169, {0, {{{0, 0}}}}, 0, 0 },
+  { "vnip", 170, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvnip", 171, {0, {{{0, 0}}}}, 0, 0 },
+  { "znip", 172, {0, {{{0, 0}}}}, 0, 0 },
+  { "cznip", 173, {0, {{{0, 0}}}}, 0, 0 },
+  { "vznip", 174, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvznip", 175, {0, {{{0, 0}}}}, 0, 0 },
+  { "xip", 176, {0, {{{0, 0}}}}, 0, 0 },
+  { "cxip", 177, {0, {{{0, 0}}}}, 0, 0 },
+  { "vxip", 178, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvxip", 179, {0, {{{0, 0}}}}, 0, 0 },
+  { "zxip", 180, {0, {{{0, 0}}}}, 0, 0 },
+  { "czxip", 181, {0, {{{0, 0}}}}, 0, 0 },
+  { "vzxip", 182, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvzxip", 183, {0, {{{0, 0}}}}, 0, 0 },
+  { "nxip", 184, {0, {{{0, 0}}}}, 0, 0 },
+  { "cnxip", 185, {0, {{{0, 0}}}}, 0, 0 },
+  { "vnxip", 186, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvnxip", 187, {0, {{{0, 0}}}}, 0, 0 },
+  { "znxip", 188, {0, {{{0, 0}}}}, 0, 0 },
+  { "cznxip", 189, {0, {{{0, 0}}}}, 0, 0 },
+  { "vznxip", 190, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvznxip", 191, {0, {{{0, 0}}}}, 0, 0 },
+  { "up", 192, {0, {{{0, 0}}}}, 0, 0 },
+  { "cup", 193, {0, {{{0, 0}}}}, 0, 0 },
+  { "vup", 194, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvup", 195, {0, {{{0, 0}}}}, 0, 0 },
+  { "zup", 196, {0, {{{0, 0}}}}, 0, 0 },
+  { "czup", 197, {0, {{{0, 0}}}}, 0, 0 },
+  { "vzup", 198, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvzup", 199, {0, {{{0, 0}}}}, 0, 0 },
+  { "nup", 200, {0, {{{0, 0}}}}, 0, 0 },
+  { "cnup", 201, {0, {{{0, 0}}}}, 0, 0 },
+  { "vnup", 202, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvnup", 203, {0, {{{0, 0}}}}, 0, 0 },
+  { "znup", 204, {0, {{{0, 0}}}}, 0, 0 },
+  { "cznup", 205, {0, {{{0, 0}}}}, 0, 0 },
+  { "vznup", 206, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvznup", 207, {0, {{{0, 0}}}}, 0, 0 },
+  { "xup", 208, {0, {{{0, 0}}}}, 0, 0 },
+  { "cxup", 209, {0, {{{0, 0}}}}, 0, 0 },
+  { "vxup", 210, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvxup", 211, {0, {{{0, 0}}}}, 0, 0 },
+  { "zxup", 212, {0, {{{0, 0}}}}, 0, 0 },
+  { "czxup", 213, {0, {{{0, 0}}}}, 0, 0 },
+  { "vzxup", 214, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvzxup", 215, {0, {{{0, 0}}}}, 0, 0 },
+  { "nxup", 216, {0, {{{0, 0}}}}, 0, 0 },
+  { "cnxup", 217, {0, {{{0, 0}}}}, 0, 0 },
+  { "vnxup", 218, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvnxup", 219, {0, {{{0, 0}}}}, 0, 0 },
+  { "znxup", 220, {0, {{{0, 0}}}}, 0, 0 },
+  { "cznxup", 221, {0, {{{0, 0}}}}, 0, 0 },
+  { "vznxup", 222, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvznxup", 223, {0, {{{0, 0}}}}, 0, 0 },
+  { "iup", 224, {0, {{{0, 0}}}}, 0, 0 },
+  { "ciup", 225, {0, {{{0, 0}}}}, 0, 0 },
+  { "viup", 226, {0, {{{0, 0}}}}, 0, 0 },
+  { "cviup", 227, {0, {{{0, 0}}}}, 0, 0 },
+  { "ziup", 228, {0, {{{0, 0}}}}, 0, 0 },
+  { "cziup", 229, {0, {{{0, 0}}}}, 0, 0 },
+  { "vziup", 230, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvziup", 231, {0, {{{0, 0}}}}, 0, 0 },
+  { "niup", 232, {0, {{{0, 0}}}}, 0, 0 },
+  { "cniup", 233, {0, {{{0, 0}}}}, 0, 0 },
+  { "vniup", 234, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvniup", 235, {0, {{{0, 0}}}}, 0, 0 },
+  { "zniup", 236, {0, {{{0, 0}}}}, 0, 0 },
+  { "czniup", 237, {0, {{{0, 0}}}}, 0, 0 },
+  { "vzniup", 238, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvzniup", 239, {0, {{{0, 0}}}}, 0, 0 },
+  { "xiup", 240, {0, {{{0, 0}}}}, 0, 0 },
+  { "cxiup", 241, {0, {{{0, 0}}}}, 0, 0 },
+  { "vxiup", 242, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvxiup", 243, {0, {{{0, 0}}}}, 0, 0 },
+  { "zxiup", 244, {0, {{{0, 0}}}}, 0, 0 },
+  { "czxiup", 245, {0, {{{0, 0}}}}, 0, 0 },
+  { "vzxiup", 246, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvzxiup", 247, {0, {{{0, 0}}}}, 0, 0 },
+  { "nxiup", 248, {0, {{{0, 0}}}}, 0, 0 },
+  { "cnxiup", 249, {0, {{{0, 0}}}}, 0, 0 },
+  { "vnxiup", 250, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvnxiup", 251, {0, {{{0, 0}}}}, 0, 0 },
+  { "znxiup", 252, {0, {{{0, 0}}}}, 0, 0 },
+  { "cznxiup", 253, {0, {{{0, 0}}}}, 0, 0 },
+  { "vznxiup", 254, {0, {{{0, 0}}}}, 0, 0 },
+  { "cvznxiup", 255, {0, {{{0, 0}}}}, 0, 0 }
 };
 
 CGEN_KEYWORD cris_cgen_opval_h_flagbits =
@@ -672,22 +672,22 @@ CGEN_KEYWORD cris_cgen_opval_h_flagbits =
 
 static CGEN_KEYWORD_ENTRY cris_cgen_opval_h_supr_entries[] =
 {
-  { "S0", 0, {0, {0}}, 0, 0 },
-  { "S1", 1, {0, {0}}, 0, 0 },
-  { "S2", 2, {0, {0}}, 0, 0 },
-  { "S3", 3, {0, {0}}, 0, 0 },
-  { "S4", 4, {0, {0}}, 0, 0 },
-  { "S5", 5, {0, {0}}, 0, 0 },
-  { "S6", 6, {0, {0}}, 0, 0 },
-  { "S7", 7, {0, {0}}, 0, 0 },
-  { "S8", 8, {0, {0}}, 0, 0 },
-  { "S9", 9, {0, {0}}, 0, 0 },
-  { "S10", 10, {0, {0}}, 0, 0 },
-  { "S11", 11, {0, {0}}, 0, 0 },
-  { "S12", 12, {0, {0}}, 0, 0 },
-  { "S13", 13, {0, {0}}, 0, 0 },
-  { "S14", 14, {0, {0}}, 0, 0 },
-  { "S15", 15, {0, {0}}, 0, 0 }
+  { "S0", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "S1", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "S2", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "S3", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "S4", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "S5", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "S6", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "S7", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "S8", 8, {0, {{{0, 0}}}}, 0, 0 },
+  { "S9", 9, {0, {{{0, 0}}}}, 0, 0 },
+  { "S10", 10, {0, {{{0, 0}}}}, 0, 0 },
+  { "S11", 11, {0, {{{0, 0}}}}, 0, 0 },
+  { "S12", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "S13", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "S14", 14, {0, {{{0, 0}}}}, 0, 0 },
+  { "S15", 15, {0, {{{0, 0}}}}, 0, 0 }
 };
 
 CGEN_KEYWORD cris_cgen_opval_h_supr =
@@ -708,67 +708,67 @@ CGEN_KEYWORD cris_cgen_opval_h_supr =
 
 const CGEN_HW_ENTRY cris_cgen_hw_table[] =
 {
-  { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
-  { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
-  { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
-  { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
-  { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
-  { "h-inc", HW_H_INC, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_h_inc, { 0, { (1<<MACH_BASE) } } },
-  { "h-ccode", HW_H_CCODE, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_h_ccode, { 0, { (1<<MACH_BASE) } } },
-  { "h-swap", HW_H_SWAP, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_h_swap, { 0, { (1<<MACH_BASE) } } },
-  { "h-flagbits", HW_H_FLAGBITS, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_h_flagbits, { 0, { (1<<MACH_BASE) } } },
-  { "h-v32-v32", HW_H_V32, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV32) } } },
-  { "h-v32-non-v32", HW_H_V32, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } } },
-  { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { (1<<MACH_BASE) } } },
-  { "h-gr", HW_H_GR, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(VIRTUAL), { (1<<MACH_BASE) } } },
-  { "h-gr-pc", HW_H_GR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_gr_names_pcreg, { 0|A(VIRTUAL), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } } },
-  { "h-gr-real-pc", HW_H_GR_REAL_PC, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_gr_names_pcreg, { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } } },
-  { "h-raw-gr-pc", HW_H_RAW_GR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } } },
-  { "h-gr-acr", HW_H_GR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_gr_names_acr, { 0, { (1<<MACH_CRISV32) } } },
-  { "h-raw-gr-acr", HW_H_RAW_GR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV32) } } },
-  { "h-sr", HW_H_SR, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(VIRTUAL), { (1<<MACH_BASE) } } },
-  { "h-sr-v0", HW_H_SR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_p_names_v10, { 0, { (1<<MACH_CRISV0) } } },
-  { "h-sr-v3", HW_H_SR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_p_names_v10, { 0, { (1<<MACH_CRISV3) } } },
-  { "h-sr-v8", HW_H_SR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_p_names_v10, { 0, { (1<<MACH_CRISV8) } } },
-  { "h-sr-v10", HW_H_SR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_p_names_v10, { 0, { (1<<MACH_CRISV10) } } },
-  { "h-sr-v32", HW_H_SR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_p_names_v32, { 0, { (1<<MACH_CRISV32) } } },
-  { "h-supr", HW_H_SUPR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV32) } } },
-  { "h-cbit", HW_H_CBIT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
-  { "h-cbit-move", HW_H_CBIT_MOVE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
-  { "h-cbit-move-v32", HW_H_CBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV32) } } },
-  { "h-cbit-move-pre-v32", HW_H_CBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } } },
-  { "h-vbit", HW_H_VBIT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
-  { "h-vbit-move", HW_H_VBIT_MOVE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
-  { "h-vbit-move-v32", HW_H_VBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV32) } } },
-  { "h-vbit-move-pre-v32", HW_H_VBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } } },
-  { "h-zbit", HW_H_ZBIT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
-  { "h-zbit-move", HW_H_ZBIT_MOVE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
-  { "h-zbit-move-v32", HW_H_ZBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV32) } } },
-  { "h-zbit-move-pre-v32", HW_H_ZBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } } },
-  { "h-nbit", HW_H_NBIT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
-  { "h-nbit-move", HW_H_NBIT_MOVE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
-  { "h-nbit-move-v32", HW_H_NBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV32) } } },
-  { "h-nbit-move-pre-v32", HW_H_NBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } } },
-  { "h-xbit", HW_H_XBIT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
-  { "h-ibit", HW_H_IBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
-  { "h-ibit-pre-v32", HW_H_IBIT_X, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } } },
-  { "h-pbit", HW_H_PBIT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV10)|(1<<MACH_CRISV32) } } },
-  { "h-rbit", HW_H_RBIT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV32) } } },
-  { "h-ubit", HW_H_UBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
-  { "h-ubit-pre-v32", HW_H_UBIT_X, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV10) } } },
-  { "h-gbit", HW_H_GBIT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV32) } } },
-  { "h-kernel-sp", HW_H_KERNEL_SP, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV32) } } },
-  { "h-ubit-v32", HW_H_UBIT_X, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV32) } } },
-  { "h-ibit-v32", HW_H_IBIT_X, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV32) } } },
-  { "h-mbit", HW_H_MBIT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV32) } } },
-  { "h-qbit", HW_H_QBIT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV32) } } },
-  { "h-sbit", HW_H_SBIT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV32) } } },
-  { "h-insn-prefixed-p", HW_H_INSN_PREFIXED_P, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
-  { "h-insn-prefixed-p-pre-v32", HW_H_INSN_PREFIXED_P_X, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } } },
-  { "h-insn-prefixed-p-v32", HW_H_INSN_PREFIXED_P_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV32) } } },
-  { "h-prefixreg-pre-v32", HW_H_PREFIXREG, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } } },
-  { "h-prefixreg-v32", HW_H_PREFIXREG, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { (1<<MACH_CRISV32) } } },
-  { 0, 0, CGEN_ASM_NONE, 0, {0, {0}} }
+  { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-inc", HW_H_INC, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_h_inc, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-ccode", HW_H_CCODE, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_h_ccode, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-swap", HW_H_SWAP, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_h_swap, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-flagbits", HW_H_FLAGBITS, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_h_flagbits, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-v32-v32", HW_H_V32, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-v32-non-v32", HW_H_V32, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } } },
+  { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-gr", HW_H_GR, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-gr-pc", HW_H_GR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_gr_names_pcreg, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } } },
+  { "h-gr-real-pc", HW_H_GR_REAL_PC, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_gr_names_pcreg, { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } } },
+  { "h-raw-gr-pc", HW_H_RAW_GR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } } },
+  { "h-gr-acr", HW_H_GR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_gr_names_acr, { 0, { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-raw-gr-acr", HW_H_RAW_GR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-sr", HW_H_SR, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-sr-v0", HW_H_SR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_p_names_v10, { 0, { { { (1<<MACH_CRISV0), 0 } } } } },
+  { "h-sr-v3", HW_H_SR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_p_names_v10, { 0, { { { (1<<MACH_CRISV3), 0 } } } } },
+  { "h-sr-v8", HW_H_SR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_p_names_v10, { 0, { { { (1<<MACH_CRISV8), 0 } } } } },
+  { "h-sr-v10", HW_H_SR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_p_names_v10, { 0, { { { (1<<MACH_CRISV10), 0 } } } } },
+  { "h-sr-v32", HW_H_SR_X, CGEN_ASM_KEYWORD, (PTR) & cris_cgen_opval_p_names_v32, { 0, { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-supr", HW_H_SUPR, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-cbit", HW_H_CBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-cbit-move", HW_H_CBIT_MOVE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-cbit-move-v32", HW_H_CBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-cbit-move-pre-v32", HW_H_CBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } } },
+  { "h-vbit", HW_H_VBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-vbit-move", HW_H_VBIT_MOVE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-vbit-move-v32", HW_H_VBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-vbit-move-pre-v32", HW_H_VBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } } },
+  { "h-zbit", HW_H_ZBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-zbit-move", HW_H_ZBIT_MOVE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-zbit-move-v32", HW_H_ZBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-zbit-move-pre-v32", HW_H_ZBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } } },
+  { "h-nbit", HW_H_NBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-nbit-move", HW_H_NBIT_MOVE, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-nbit-move-v32", HW_H_NBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-nbit-move-pre-v32", HW_H_NBIT_MOVE_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } } },
+  { "h-xbit", HW_H_XBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-ibit", HW_H_IBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-ibit-pre-v32", HW_H_IBIT_X, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } } },
+  { "h-pbit", HW_H_PBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } } },
+  { "h-rbit", HW_H_RBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-ubit", HW_H_UBIT, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-ubit-pre-v32", HW_H_UBIT_X, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV10), 0 } } } } },
+  { "h-gbit", HW_H_GBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-kernel-sp", HW_H_KERNEL_SP, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-ubit-v32", HW_H_UBIT_X, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-ibit-v32", HW_H_IBIT_X, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-mbit", HW_H_MBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-qbit", HW_H_QBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-sbit", HW_H_SBIT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-insn-prefixed-p", HW_H_INSN_PREFIXED_P, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } } },
+  { "h-insn-prefixed-p-pre-v32", HW_H_INSN_PREFIXED_P_X, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } } },
+  { "h-insn-prefixed-p-v32", HW_H_INSN_PREFIXED_P_X, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV32), 0 } } } } },
+  { "h-prefixreg-pre-v32", HW_H_PREFIXREG, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } } },
+  { "h-prefixreg-v32", HW_H_PREFIXREG, CGEN_ASM_NONE, 0, { 0|A(VIRTUAL), { { { (1<<MACH_CRISV32), 0 } } } } },
+  { 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
 };
 
 #undef A
@@ -784,33 +784,33 @@ const CGEN_HW_ENTRY cris_cgen_hw_table[] =
 
 const CGEN_IFLD cris_cgen_ifld_table[] =
 {
-  { CRIS_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_OPERAND1, "f-operand1", 0, 16, 3, 4, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_SIZE, "f-size", 0, 16, 5, 2, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_OPCODE, "f-opcode", 0, 16, 9, 4, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_MODE, "f-mode", 0, 16, 11, 2, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_OPERAND2, "f-operand2", 0, 16, 15, 4, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_MEMMODE, "f-memmode", 0, 16, 10, 1, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_MEMBIT, "f-membit", 0, 16, 11, 1, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_B5, "f-b5", 0, 16, 5, 1, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_OPCODE_HI, "f-opcode-hi", 0, 16, 9, 2, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_DSTSRC, "f-dstsrc", 0, 0, 0, 0,{ 0|A(VIRTUAL), { (1<<MACH_BASE) } }  },
-  { CRIS_F_U6, "f-u6", 0, 16, 5, 6, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_S6, "f-s6", 0, 16, 5, 6, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_U5, "f-u5", 0, 16, 4, 5, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_U4, "f-u4", 0, 16, 3, 4, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_S8, "f-s8", 0, 16, 7, 8, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_DISP9_HI, "f-disp9-hi", 0, 16, 0, 1, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_DISP9_LO, "f-disp9-lo", 0, 16, 7, 7, { 0, { (1<<MACH_BASE) } }  },
-  { CRIS_F_DISP9, "f-disp9", 0, 0, 0, 0,{ 0|A(PCREL_ADDR)|A(VIRTUAL), { (1<<MACH_BASE) } }  },
-  { CRIS_F_QO, "f-qo", 0, 16, 3, 4, { 0|A(PCREL_ADDR), { (1<<MACH_CRISV32) } }  },
-  { CRIS_F_INDIR_PC__BYTE, "f-indir-pc+-byte", 16, 16, 15, 16, { 0|A(SIGN_OPT), { (1<<MACH_BASE) } }  },
-  { CRIS_F_INDIR_PC__WORD, "f-indir-pc+-word", 16, 16, 15, 16, { 0|A(SIGN_OPT), { (1<<MACH_BASE) } }  },
-  { CRIS_F_INDIR_PC__WORD_PCREL, "f-indir-pc+-word-pcrel", 16, 16, 15, 16, { 0|A(SIGN_OPT)|A(PCREL_ADDR), { (1<<MACH_BASE) } }  },
-  { CRIS_F_INDIR_PC__DWORD, "f-indir-pc+-dword", 16, 32, 31, 32, { 0|A(SIGN_OPT), { (1<<MACH_BASE) } }  },
-  { CRIS_F_INDIR_PC__DWORD_PCREL, "f-indir-pc+-dword-pcrel", 16, 32, 31, 32, { 0|A(PCREL_ADDR)|A(SIGN_OPT), { (1<<MACH_CRISV32) } }  },
-  { 0, 0, 0, 0, 0, 0, {0, {0}} }
+  { CRIS_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_OPERAND1, "f-operand1", 0, 16, 3, 4, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_SIZE, "f-size", 0, 16, 5, 2, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_OPCODE, "f-opcode", 0, 16, 9, 4, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_MODE, "f-mode", 0, 16, 11, 2, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_OPERAND2, "f-operand2", 0, 16, 15, 4, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_MEMMODE, "f-memmode", 0, 16, 10, 1, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_MEMBIT, "f-membit", 0, 16, 11, 1, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_B5, "f-b5", 0, 16, 5, 1, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_OPCODE_HI, "f-opcode-hi", 0, 16, 9, 2, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_DSTSRC, "f-dstsrc", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_U6, "f-u6", 0, 16, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_S6, "f-s6", 0, 16, 5, 6, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_U5, "f-u5", 0, 16, 4, 5, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_U4, "f-u4", 0, 16, 3, 4, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_S8, "f-s8", 0, 16, 7, 8, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_DISP9_HI, "f-disp9-hi", 0, 16, 0, 1, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_DISP9_LO, "f-disp9-lo", 0, 16, 7, 7, { 0, { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_DISP9, "f-disp9", 0, 0, 0, 0,{ 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_QO, "f-qo", 0, 16, 3, 4, { 0|A(PCREL_ADDR), { { { (1<<MACH_CRISV32), 0 } } } }  },
+  { CRIS_F_INDIR_PC__BYTE, "f-indir-pc+-byte", 16, 16, 15, 16, { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_INDIR_PC__WORD, "f-indir-pc+-word", 16, 16, 15, 16, { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_INDIR_PC__WORD_PCREL, "f-indir-pc+-word-pcrel", 16, 16, 15, 16, { 0|A(SIGN_OPT)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_INDIR_PC__DWORD, "f-indir-pc+-dword", 16, 32, 31, 32, { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
+  { CRIS_F_INDIR_PC__DWORD_PCREL, "f-indir-pc+-dword-pcrel", 16, 32, 31, 32, { 0|A(PCREL_ADDR)|A(SIGN_OPT), { { { (1<<MACH_CRISV32), 0 } } } }  },
+  { 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } }
 };
 
 #undef A
@@ -856,179 +856,179 @@ const CGEN_OPERAND cris_cgen_operand_table[] =
 /* pc: program counter */
   { "pc", CRIS_OPERAND_PC, HW_H_PC, 0, 0,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_NIL] } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* cbit:  */
   { "cbit", CRIS_OPERAND_CBIT, HW_H_CBIT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* cbit-move: cbit for pre-V32, nothing for newer */
   { "cbit-move", CRIS_OPERAND_CBIT_MOVE, HW_H_CBIT_MOVE, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* vbit:  */
   { "vbit", CRIS_OPERAND_VBIT, HW_H_VBIT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* vbit-move: vbit for pre-V32, nothing for newer */
   { "vbit-move", CRIS_OPERAND_VBIT_MOVE, HW_H_VBIT_MOVE, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* zbit:  */
   { "zbit", CRIS_OPERAND_ZBIT, HW_H_ZBIT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* zbit-move: zbit for pre-V32, nothing for newer */
   { "zbit-move", CRIS_OPERAND_ZBIT_MOVE, HW_H_ZBIT_MOVE, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* nbit:  */
   { "nbit", CRIS_OPERAND_NBIT, HW_H_NBIT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* nbit-move: nbit for pre-V32, nothing for newer */
   { "nbit-move", CRIS_OPERAND_NBIT_MOVE, HW_H_NBIT_MOVE, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* xbit:  */
   { "xbit", CRIS_OPERAND_XBIT, HW_H_XBIT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* ibit:  */
   { "ibit", CRIS_OPERAND_IBIT, HW_H_IBIT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* ubit:  */
   { "ubit", CRIS_OPERAND_UBIT, HW_H_UBIT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_CRISV10)|(1<<MACH_CRISV32) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } }  },
 /* pbit:  */
   { "pbit", CRIS_OPERAND_PBIT, HW_H_PBIT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_CRISV10)|(1<<MACH_CRISV32) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } }  },
 /* rbit: carry bit for MCP+restore-P flag bit */
   { "rbit", CRIS_OPERAND_RBIT, HW_H_RBIT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_CRISV32) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* sbit:  */
   { "sbit", CRIS_OPERAND_SBIT, HW_H_SBIT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_CRISV32) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* mbit:  */
   { "mbit", CRIS_OPERAND_MBIT, HW_H_MBIT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_CRISV32) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* qbit:  */
   { "qbit", CRIS_OPERAND_QBIT, HW_H_QBIT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_CRISV32) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* prefix-set: Instruction-prefixed flag */
   { "prefix-set", CRIS_OPERAND_PREFIX_SET, HW_H_INSN_PREFIXED_P, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* prefixreg: Prefix address */
   { "prefixreg", CRIS_OPERAND_PREFIXREG, HW_H_PREFIXREG, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0|A(SEM_ONLY), { (1<<MACH_BASE) } }  },
+    { 0|A(SEM_ONLY), { { { (1<<MACH_BASE), 0 } } } }  },
 /* Rs: Source general register */
   { "Rs", CRIS_OPERAND_RS, HW_H_GR, 3, 4,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_OPERAND1] } }, 
-    { 0, { (1<<MACH_BASE) } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* inc: Incrementness of indirect operand */
   { "inc", CRIS_OPERAND_INC, HW_H_INC, 10, 1,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_MEMMODE] } }, 
-    { 0, { (1<<MACH_BASE) } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* Ps: Source special register */
   { "Ps", CRIS_OPERAND_PS, HW_H_SR, 15, 4,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
-    { 0, { (1<<MACH_BASE) } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* Ss: Source support register */
   { "Ss", CRIS_OPERAND_SS, HW_H_SUPR, 15, 4,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
-    { 0, { (1<<MACH_CRISV32) } }  },
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* Sd: Destination support register */
   { "Sd", CRIS_OPERAND_SD, HW_H_SUPR, 15, 4,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
-    { 0, { (1<<MACH_CRISV32) } }  },
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* i: Quick signed 6-bit */
   { "i", CRIS_OPERAND_I, HW_H_SINT, 5, 6,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_S6] } }, 
-    { 0, { (1<<MACH_BASE) } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* j: Quick unsigned 6-bit */
   { "j", CRIS_OPERAND_J, HW_H_UINT, 5, 6,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_U6] } }, 
-    { 0, { (1<<MACH_BASE) } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* c: Quick unsigned 5-bit */
   { "c", CRIS_OPERAND_C, HW_H_UINT, 4, 5,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_U5] } }, 
-    { 0, { (1<<MACH_BASE) } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* qo: Quick unsigned 4-bit, PC-relative */
   { "qo", CRIS_OPERAND_QO, HW_H_ADDR, 3, 4,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_QO] } }, 
-    { 0|A(PCREL_ADDR), { (1<<MACH_CRISV32) } }  },
+    { 0|A(PCREL_ADDR), { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* Rd: Destination general register */
   { "Rd", CRIS_OPERAND_RD, HW_H_GR, 15, 4,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
-    { 0, { (1<<MACH_BASE) } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* sconst8: Signed byte [PC+] */
   { "sconst8", CRIS_OPERAND_SCONST8, HW_H_SINT, 15, 16,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_INDIR_PC__BYTE] } }, 
-    { 0|A(SIGN_OPT), { (1<<MACH_BASE) } }  },
+    { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
 /* uconst8: Unsigned byte [PC+] */
   { "uconst8", CRIS_OPERAND_UCONST8, HW_H_UINT, 15, 16,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_INDIR_PC__BYTE] } }, 
-    { 0|A(SIGN_OPT), { (1<<MACH_BASE) } }  },
+    { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
 /* sconst16: Signed word [PC+] */
   { "sconst16", CRIS_OPERAND_SCONST16, HW_H_SINT, 15, 16,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_INDIR_PC__WORD] } }, 
-    { 0|A(SIGN_OPT), { (1<<MACH_BASE) } }  },
+    { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
 /* uconst16: Unsigned word [PC+] */
   { "uconst16", CRIS_OPERAND_UCONST16, HW_H_UINT, 15, 16,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_INDIR_PC__WORD] } }, 
-    { 0|A(SIGN_OPT), { (1<<MACH_BASE) } }  },
+    { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
 /* const32: Dword [PC+] */
   { "const32", CRIS_OPERAND_CONST32, HW_H_UINT, 31, 32,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_INDIR_PC__DWORD] } }, 
-    { 0|A(SIGN_OPT), { (1<<MACH_BASE) } }  },
+    { 0|A(SIGN_OPT), { { { (1<<MACH_BASE), 0 } } } }  },
 /* const32-pcrel: Dword [PC+] */
   { "const32-pcrel", CRIS_OPERAND_CONST32_PCREL, HW_H_ADDR, 31, 32,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_INDIR_PC__DWORD_PCREL] } }, 
-    { 0|A(PCREL_ADDR)|A(SIGN_OPT), { (1<<MACH_CRISV32) } }  },
+    { 0|A(PCREL_ADDR)|A(SIGN_OPT), { { { (1<<MACH_CRISV32), 0 } } } }  },
 /* Pd: Destination special register */
   { "Pd", CRIS_OPERAND_PD, HW_H_SR, 15, 4,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
-    { 0, { (1<<MACH_BASE) } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* o: Signed 8-bit */
   { "o", CRIS_OPERAND_O, HW_H_SINT, 7, 8,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_S8] } }, 
-    { 0, { (1<<MACH_BASE) } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* o-pcrel: 9-bit signed immediate PC-rel */
   { "o-pcrel", CRIS_OPERAND_O_PCREL, HW_H_IADDR, 0, 8,
     { 2, { (const PTR) &CRIS_F_DISP9_MULTI_IFIELD[0] } }, 
-    { 0|A(PCREL_ADDR)|A(VIRTUAL), { (1<<MACH_BASE) } }  },
+    { 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } }  },
 /* o-word-pcrel: 16-bit signed immediate PC-rel */
   { "o-word-pcrel", CRIS_OPERAND_O_WORD_PCREL, HW_H_IADDR, 15, 16,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_INDIR_PC__WORD_PCREL] } }, 
-    { 0|A(SIGN_OPT)|A(PCREL_ADDR), { (1<<MACH_BASE) } }  },
+    { 0|A(SIGN_OPT)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } } } }  },
 /* cc: Condition codes */
   { "cc", CRIS_OPERAND_CC, HW_H_CCODE, 15, 4,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
-    { 0, { (1<<MACH_BASE) } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* n: Quick unsigned 4-bit */
   { "n", CRIS_OPERAND_N, HW_H_UINT, 3, 4,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_U4] } }, 
-    { 0, { (1<<MACH_BASE) } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* swapoption: Swap option */
   { "swapoption", CRIS_OPERAND_SWAPOPTION, HW_H_SWAP, 15, 4,
     { 0, { (const PTR) &cris_cgen_ifld_table[CRIS_F_OPERAND2] } }, 
-    { 0, { (1<<MACH_BASE) } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } } } }  },
 /* list-of-flags: Flag bits as operand */
   { "list-of-flags", CRIS_OPERAND_LIST_OF_FLAGS, HW_H_FLAGBITS, 3, 8,
     { 2, { (const PTR) &CRIS_F_DSTSRC_MULTI_IFIELD[0] } }, 
-    { 0|A(VIRTUAL), { (1<<MACH_BASE) } }  },
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } } } }  },
 /* sentinel */
   { 0, 0, 0, 0, 0,
     { 0, { (const PTR) 0 } },
-    { 0, { 0 } } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } } }
 };
 
 #undef A
@@ -1048,1501 +1048,1501 @@ static const CGEN_IBASE cris_cgen_insn_table[MAX_INSNS] =
   /* Special null first entry.
      A `num' value of zero is thus invalid.
      Also, the special `invalid' insn resides here.  */
-  { 0, 0, 0, 0, {0, {0}} },
+  { 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } } } } },
 /* nop */
   {
     CRIS_INSN_NOP, "nop", "nop", 16,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* move.b move.m ${Rs},${Rd} */
   {
     CRIS_INSN_MOVE_B_R, "move.b-r", "move.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move.w move.m ${Rs},${Rd} */
   {
     CRIS_INSN_MOVE_W_R, "move.w-r", "move.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move.d move.m ${Rs},${Rd} */
   {
     CRIS_INSN_MOVE_D_R, "move.d-r", "move.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move.d PC,${Rd} */
   {
     CRIS_INSN_MOVEPCR, "movepcr", "move.d", 16,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* moveq $i,$Rd */
   {
     CRIS_INSN_MOVEQ, "moveq", "moveq", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* movs.b movs.m ${Rs},${Rd} */
   {
     CRIS_INSN_MOVS_B_R, "movs.b-r", "movs.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* movs.w movs.m ${Rs},${Rd} */
   {
     CRIS_INSN_MOVS_W_R, "movs.w-r", "movs.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* movu.b movu.m ${Rs},${Rd} */
   {
     CRIS_INSN_MOVU_B_R, "movu.b-r", "movu.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* movu.w movu.m ${Rs},${Rd} */
   {
     CRIS_INSN_MOVU_W_R, "movu.w-r", "movu.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move.b ${sconst8},${Rd} */
   {
     CRIS_INSN_MOVECBR, "movecbr", "move.b", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move.w ${sconst16},${Rd} */
   {
     CRIS_INSN_MOVECWR, "movecwr", "move.w", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move.d ${const32},${Rd} */
   {
     CRIS_INSN_MOVECDR, "movecdr", "move.d", 48,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* movs.b ${sconst8},${Rd} */
   {
     CRIS_INSN_MOVSCBR, "movscbr", "movs.b", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* movs.w ${sconst16},${Rd} */
   {
     CRIS_INSN_MOVSCWR, "movscwr", "movs.w", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* movu.b ${uconst8},${Rd} */
   {
     CRIS_INSN_MOVUCBR, "movucbr", "movu.b", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* movu.w ${uconst16},${Rd} */
   {
     CRIS_INSN_MOVUCWR, "movucwr", "movu.w", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addq $j,$Rd */
   {
     CRIS_INSN_ADDQ, "addq", "addq", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* subq $j,$Rd */
   {
     CRIS_INSN_SUBQ, "subq", "subq", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmp-r.b $Rs,$Rd */
   {
     CRIS_INSN_CMP_R_B_R, "cmp-r.b-r", "cmp-r.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmp-r.w $Rs,$Rd */
   {
     CRIS_INSN_CMP_R_W_R, "cmp-r.w-r", "cmp-r.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmp-r.d $Rs,$Rd */
   {
     CRIS_INSN_CMP_R_D_R, "cmp-r.d-r", "cmp-r.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmp-m.b [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_CMP_M_B_M, "cmp-m.b-m", "cmp-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmp-m.w [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_CMP_M_W_M, "cmp-m.w-m", "cmp-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmp-m.d [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_CMP_M_D_M, "cmp-m.d-m", "cmp-m.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmp.b $sconst8,$Rd */
   {
     CRIS_INSN_CMPCBR, "cmpcbr", "cmp.b", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmp.w $sconst16,$Rd */
   {
     CRIS_INSN_CMPCWR, "cmpcwr", "cmp.w", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmp.d $const32,$Rd */
   {
     CRIS_INSN_CMPCDR, "cmpcdr", "cmp.d", 48,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmpq $i,$Rd */
   {
     CRIS_INSN_CMPQ, "cmpq", "cmpq", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmps-m.b [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_CMPS_M_B_M, "cmps-m.b-m", "cmps-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmps-m.w [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_CMPS_M_W_M, "cmps-m.w-m", "cmps-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_CMPSCBR, "cmpscbr", "[", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_CMPSCWR, "cmpscwr", "[", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmpu-m.b [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_CMPU_M_B_M, "cmpu-m.b-m", "cmpu-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* cmpu-m.w [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_CMPU_M_W_M, "cmpu-m.w-m", "cmpu-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_CMPUCBR, "cmpucbr", "[", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_CMPUCWR, "cmpucwr", "[", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move-m.b [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_MOVE_M_B_M, "move-m.b-m", "move-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move-m.w [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_MOVE_M_W_M, "move-m.w-m", "move-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move-m.d [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_MOVE_M_D_M, "move-m.d-m", "move-m.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* movs-m.b [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_MOVS_M_B_M, "movs-m.b-m", "movs-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* movs-m.w [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_MOVS_M_W_M, "movs-m.w-m", "movs-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* movu-m.b [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_MOVU_M_B_M, "movu-m.b-m", "movu-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* movu-m.w [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_MOVU_M_W_M, "movu-m.w-m", "movu-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move ${Rs},${Pd} */
   {
     CRIS_INSN_MOVE_R_SPRV0, "move-r-sprv0", "move", 16,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${Rs},${Pd} */
   {
     CRIS_INSN_MOVE_R_SPRV3, "move-r-sprv3", "move", 16,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${Rs},${Pd} */
   {
     CRIS_INSN_MOVE_R_SPRV8, "move-r-sprv8", "move", 16,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${Rs},${Pd} */
   {
     CRIS_INSN_MOVE_R_SPRV10, "move-r-sprv10", "move", 16,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${Rs},${Pd} */
   {
     CRIS_INSN_MOVE_R_SPRV32, "move-r-sprv32", "move", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${Ps},${Rd-sfield} */
   {
     CRIS_INSN_MOVE_SPR_RV0, "move-spr-rv0", "move", 16,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${Ps},${Rd-sfield} */
   {
     CRIS_INSN_MOVE_SPR_RV3, "move-spr-rv3", "move", 16,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${Ps},${Rd-sfield} */
   {
     CRIS_INSN_MOVE_SPR_RV8, "move-spr-rv8", "move", 16,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${Ps},${Rd-sfield} */
   {
     CRIS_INSN_MOVE_SPR_RV10, "move-spr-rv10", "move", 16,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${Ps},${Rd-sfield} */
   {
     CRIS_INSN_MOVE_SPR_RV32, "move-spr-rv32", "move", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* ret/reti/retb */
   {
     CRIS_INSN_RET_TYPE, "ret-type", "ret/reti/retb", 16,
-    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* move [${Rs}${inc}],${Pd} */
   {
     CRIS_INSN_MOVE_M_SPRV0, "move-m-sprv0", "move", 16,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move [${Rs}${inc}],${Pd} */
   {
     CRIS_INSN_MOVE_M_SPRV3, "move-m-sprv3", "move", 16,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move [${Rs}${inc}],${Pd} */
   {
     CRIS_INSN_MOVE_M_SPRV8, "move-m-sprv8", "move", 16,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move [${Rs}${inc}],${Pd} */
   {
     CRIS_INSN_MOVE_M_SPRV10, "move-m-sprv10", "move", 16,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move [${Rs}${inc}],${Pd} */
   {
     CRIS_INSN_MOVE_M_SPRV32, "move-m-sprv32", "move", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${sconst8},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV0_P0, "move-c-sprv0-p0", "move", 32,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${sconst8},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV0_P1, "move-c-sprv0-p1", "move", 32,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${sconst16},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV0_P4, "move-c-sprv0-p4", "move", 32,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${sconst16},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV0_P5, "move-c-sprv0-p5", "move", 32,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV0_P8, "move-c-sprv0-p8", "move", 48,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV0_P9, "move-c-sprv0-p9", "move", 48,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV0_P10, "move-c-sprv0-p10", "move", 48,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV0_P11, "move-c-sprv0-p11", "move", 48,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV0_P12, "move-c-sprv0-p12", "move", 48,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV0_P13, "move-c-sprv0-p13", "move", 48,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${sconst16},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV0_P6, "move-c-sprv0-p6", "move", 32,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${sconst16},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV0_P7, "move-c-sprv0-p7", "move", 32,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${sconst8},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P0, "move-c-sprv3-p0", "move", 32,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${sconst8},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P1, "move-c-sprv3-p1", "move", 32,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${sconst16},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P4, "move-c-sprv3-p4", "move", 32,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${sconst16},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P5, "move-c-sprv3-p5", "move", 32,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P8, "move-c-sprv3-p8", "move", 48,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P9, "move-c-sprv3-p9", "move", 48,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P10, "move-c-sprv3-p10", "move", 48,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P11, "move-c-sprv3-p11", "move", 48,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P12, "move-c-sprv3-p12", "move", 48,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P13, "move-c-sprv3-p13", "move", 48,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${sconst16},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P6, "move-c-sprv3-p6", "move", 32,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${sconst16},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P7, "move-c-sprv3-p7", "move", 32,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV3_P14, "move-c-sprv3-p14", "move", 48,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${sconst8},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV8_P0, "move-c-sprv8-p0", "move", 32,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${sconst8},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV8_P1, "move-c-sprv8-p1", "move", 32,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${sconst16},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV8_P4, "move-c-sprv8-p4", "move", 32,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${sconst16},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV8_P5, "move-c-sprv8-p5", "move", 32,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV8_P8, "move-c-sprv8-p8", "move", 48,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV8_P9, "move-c-sprv8-p9", "move", 48,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV8_P10, "move-c-sprv8-p10", "move", 48,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV8_P11, "move-c-sprv8-p11", "move", 48,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV8_P12, "move-c-sprv8-p12", "move", 48,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV8_P13, "move-c-sprv8-p13", "move", 48,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV8_P14, "move-c-sprv8-p14", "move", 48,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${sconst8},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P0, "move-c-sprv10-p0", "move", 32,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${sconst8},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P1, "move-c-sprv10-p1", "move", 32,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${sconst16},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P4, "move-c-sprv10-p4", "move", 32,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${sconst16},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P5, "move-c-sprv10-p5", "move", 32,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P8, "move-c-sprv10-p8", "move", 48,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P9, "move-c-sprv10-p9", "move", 48,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P10, "move-c-sprv10-p10", "move", 48,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P11, "move-c-sprv10-p11", "move", 48,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P12, "move-c-sprv10-p12", "move", 48,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P13, "move-c-sprv10-p13", "move", 48,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P7, "move-c-sprv10-p7", "move", 48,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P14, "move-c-sprv10-p14", "move", 48,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV10_P15, "move-c-sprv10-p15", "move", 48,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P0, "move-c-sprv32-p0", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P1, "move-c-sprv32-p1", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P2, "move-c-sprv32-p2", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P3, "move-c-sprv32-p3", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P4, "move-c-sprv32-p4", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P5, "move-c-sprv32-p5", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P6, "move-c-sprv32-p6", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P7, "move-c-sprv32-p7", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P8, "move-c-sprv32-p8", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P9, "move-c-sprv32-p9", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P10, "move-c-sprv32-p10", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P11, "move-c-sprv32-p11", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P12, "move-c-sprv32-p12", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P13, "move-c-sprv32-p13", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P14, "move-c-sprv32-p14", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${const32},${Pd} */
   {
     CRIS_INSN_MOVE_C_SPRV32_P15, "move-c-sprv32-p15", "move", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${Ps},[${Rd-sfield}${inc}] */
   {
     CRIS_INSN_MOVE_SPR_MV0, "move-spr-mv0", "move", 16,
-    { 0, { (1<<MACH_CRISV0) } }
+    { 0, { { { (1<<MACH_CRISV0), 0 } } } }
   },
 /* move ${Ps},[${Rd-sfield}${inc}] */
   {
     CRIS_INSN_MOVE_SPR_MV3, "move-spr-mv3", "move", 16,
-    { 0, { (1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV3), 0 } } } }
   },
 /* move ${Ps},[${Rd-sfield}${inc}] */
   {
     CRIS_INSN_MOVE_SPR_MV8, "move-spr-mv8", "move", 16,
-    { 0, { (1<<MACH_CRISV8) } }
+    { 0, { { { (1<<MACH_CRISV8), 0 } } } }
   },
 /* move ${Ps},[${Rd-sfield}${inc}] */
   {
     CRIS_INSN_MOVE_SPR_MV10, "move-spr-mv10", "move", 16,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${Ps},[${Rd-sfield}${inc}] */
   {
     CRIS_INSN_MOVE_SPR_MV32, "move-spr-mv32", "move", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* sbfs [${Rd-sfield}${inc}] */
   {
     CRIS_INSN_SBFS, "sbfs", "sbfs", 16,
-    { 0, { (1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV10), 0 } } } }
   },
 /* move ${Ss},${Rd-sfield} */
   {
     CRIS_INSN_MOVE_SS_R, "move-ss-r", "move", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* move ${Rs},${Sd} */
   {
     CRIS_INSN_MOVE_R_SS, "move-r-ss", "move", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* movem ${Rs-dfield},[${Rd-sfield}${inc}] */
   {
     CRIS_INSN_MOVEM_R_M, "movem-r-m", "movem", 16,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* movem ${Rs-dfield},[${Rd-sfield}${inc}] */
   {
     CRIS_INSN_MOVEM_R_M_V32, "movem-r-m-v32", "movem", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* movem [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_MOVEM_M_R, "movem-m-r", "movem", 16,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* movem [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_MOVEM_M_PC, "movem-m-pc", "movem", 16,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* movem [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_MOVEM_M_R_V32, "movem-m-r-v32", "movem", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* add.b $Rs,$Rd */
   {
     CRIS_INSN_ADD_B_R, "add.b-r", "add.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* add.w $Rs,$Rd */
   {
     CRIS_INSN_ADD_W_R, "add.w-r", "add.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* add.d $Rs,$Rd */
   {
     CRIS_INSN_ADD_D_R, "add.d-r", "add.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* add-m.b [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_ADD_M_B_M, "add-m.b-m", "add-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* add-m.w [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_ADD_M_W_M, "add-m.w-m", "add-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* add-m.d [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_ADD_M_D_M, "add-m.d-m", "add-m.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* add.b ${sconst8}],${Rd} */
   {
     CRIS_INSN_ADDCBR, "addcbr", "add.b", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* add.w ${sconst16}],${Rd} */
   {
     CRIS_INSN_ADDCWR, "addcwr", "add.w", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* add.d ${const32}],${Rd} */
   {
     CRIS_INSN_ADDCDR, "addcdr", "add.d", 48,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* add.d ${sconst32},PC */
   {
     CRIS_INSN_ADDCPC, "addcpc", "add.d", 48,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* adds.b $Rs,$Rd */
   {
     CRIS_INSN_ADDS_B_R, "adds.b-r", "adds.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* adds.w $Rs,$Rd */
   {
     CRIS_INSN_ADDS_W_R, "adds.w-r", "adds.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* adds-m.b [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_ADDS_M_B_M, "adds-m.b-m", "adds-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* adds-m.w [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_ADDS_M_W_M, "adds-m.w-m", "adds-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_ADDSCBR, "addscbr", "[", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_ADDSCWR, "addscwr", "[", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* adds.w [PC],PC */
   {
     CRIS_INSN_ADDSPCPC, "addspcpc", "adds.w", 16,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* addu.b $Rs,$Rd */
   {
     CRIS_INSN_ADDU_B_R, "addu.b-r", "addu.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addu.w $Rs,$Rd */
   {
     CRIS_INSN_ADDU_W_R, "addu.w-r", "addu.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addu-m.b [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_ADDU_M_B_M, "addu-m.b-m", "addu-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addu-m.w [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_ADDU_M_W_M, "addu-m.w-m", "addu-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_ADDUCBR, "adducbr", "[", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_ADDUCWR, "adducwr", "[", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* sub.b $Rs,$Rd */
   {
     CRIS_INSN_SUB_B_R, "sub.b-r", "sub.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* sub.w $Rs,$Rd */
   {
     CRIS_INSN_SUB_W_R, "sub.w-r", "sub.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* sub.d $Rs,$Rd */
   {
     CRIS_INSN_SUB_D_R, "sub.d-r", "sub.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* sub-m.b [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_SUB_M_B_M, "sub-m.b-m", "sub-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* sub-m.w [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_SUB_M_W_M, "sub-m.w-m", "sub-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* sub-m.d [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_SUB_M_D_M, "sub-m.d-m", "sub-m.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* sub.b ${sconst8}],${Rd} */
   {
     CRIS_INSN_SUBCBR, "subcbr", "sub.b", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* sub.w ${sconst16}],${Rd} */
   {
     CRIS_INSN_SUBCWR, "subcwr", "sub.w", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* sub.d ${const32}],${Rd} */
   {
     CRIS_INSN_SUBCDR, "subcdr", "sub.d", 48,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* subs.b $Rs,$Rd */
   {
     CRIS_INSN_SUBS_B_R, "subs.b-r", "subs.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* subs.w $Rs,$Rd */
   {
     CRIS_INSN_SUBS_W_R, "subs.w-r", "subs.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* subs-m.b [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_SUBS_M_B_M, "subs-m.b-m", "subs-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* subs-m.w [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_SUBS_M_W_M, "subs-m.w-m", "subs-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_SUBSCBR, "subscbr", "[", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_SUBSCWR, "subscwr", "[", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* subu.b $Rs,$Rd */
   {
     CRIS_INSN_SUBU_B_R, "subu.b-r", "subu.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* subu.w $Rs,$Rd */
   {
     CRIS_INSN_SUBU_W_R, "subu.w-r", "subu.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* subu-m.b [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_SUBU_M_B_M, "subu-m.b-m", "subu-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* subu-m.w [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_SUBU_M_W_M, "subu-m.w-m", "subu-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_SUBUCBR, "subucbr", "[", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* [${Rs}${inc}],$Rd */
   {
     CRIS_INSN_SUBUCWR, "subucwr", "[", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addc $Rs,$Rd */
   {
     CRIS_INSN_ADDC_R, "addc-r", "addc", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* addc [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_ADDC_M, "addc-m", "addc", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* addc ${const32},${Rd} */
   {
     CRIS_INSN_ADDC_C, "addc-c", "addc", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* lapc.d ${const32-pcrel},${Rd} */
   {
     CRIS_INSN_LAPC_D, "lapc-d", "lapc.d", 48,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* lapcq ${qo},${Rd} */
   {
     CRIS_INSN_LAPCQ, "lapcq", "lapcq", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* addi.b ${Rs-dfield}.m,${Rd-sfield} */
   {
     CRIS_INSN_ADDI_B_R, "addi.b-r", "addi.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addi.w ${Rs-dfield}.m,${Rd-sfield} */
   {
     CRIS_INSN_ADDI_W_R, "addi.w-r", "addi.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addi.d ${Rs-dfield}.m,${Rd-sfield} */
   {
     CRIS_INSN_ADDI_D_R, "addi.d-r", "addi.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* neg.b $Rs,$Rd */
   {
     CRIS_INSN_NEG_B_R, "neg.b-r", "neg.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* neg.w $Rs,$Rd */
   {
     CRIS_INSN_NEG_W_R, "neg.w-r", "neg.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* neg.d $Rs,$Rd */
   {
     CRIS_INSN_NEG_D_R, "neg.d-r", "neg.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* test-m.b [${Rs}${inc}] */
   {
     CRIS_INSN_TEST_M_B_M, "test-m.b-m", "test-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* test-m.w [${Rs}${inc}] */
   {
     CRIS_INSN_TEST_M_W_M, "test-m.w-m", "test-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* test-m.d [${Rs}${inc}] */
   {
     CRIS_INSN_TEST_M_D_M, "test-m.d-m", "test-m.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move-r-m.b ${Rs-dfield},[${Rd-sfield}${inc}] */
   {
     CRIS_INSN_MOVE_R_M_B_M, "move-r-m.b-m", "move-r-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move-r-m.w ${Rs-dfield},[${Rd-sfield}${inc}] */
   {
     CRIS_INSN_MOVE_R_M_W_M, "move-r-m.w-m", "move-r-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* move-r-m.d ${Rs-dfield},[${Rd-sfield}${inc}] */
   {
     CRIS_INSN_MOVE_R_M_D_M, "move-r-m.d-m", "move-r-m.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* muls.b $Rs,$Rd */
   {
     CRIS_INSN_MULS_B, "muls.b", "muls.b", 16,
-    { 0, { (1<<MACH_CRISV10)|(1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } }
   },
 /* muls.w $Rs,$Rd */
   {
     CRIS_INSN_MULS_W, "muls.w", "muls.w", 16,
-    { 0, { (1<<MACH_CRISV10)|(1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } }
   },
 /* muls.d $Rs,$Rd */
   {
     CRIS_INSN_MULS_D, "muls.d", "muls.d", 16,
-    { 0, { (1<<MACH_CRISV10)|(1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } }
   },
 /* mulu.b $Rs,$Rd */
   {
     CRIS_INSN_MULU_B, "mulu.b", "mulu.b", 16,
-    { 0, { (1<<MACH_CRISV10)|(1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } }
   },
 /* mulu.w $Rs,$Rd */
   {
     CRIS_INSN_MULU_W, "mulu.w", "mulu.w", 16,
-    { 0, { (1<<MACH_CRISV10)|(1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } }
   },
 /* mulu.d $Rs,$Rd */
   {
     CRIS_INSN_MULU_D, "mulu.d", "mulu.d", 16,
-    { 0, { (1<<MACH_CRISV10)|(1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } }
   },
 /* mcp $Ps,$Rd */
   {
     CRIS_INSN_MCP, "mcp", "mcp", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* mstep $Rs,$Rd */
   {
     CRIS_INSN_MSTEP, "mstep", "mstep", 16,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* dstep $Rs,$Rd */
   {
     CRIS_INSN_DSTEP, "dstep", "dstep", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* abs $Rs,$Rd */
   {
     CRIS_INSN_ABS, "abs", "abs", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* and.b $Rs,$Rd */
   {
     CRIS_INSN_AND_B_R, "and.b-r", "and.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* and.w $Rs,$Rd */
   {
     CRIS_INSN_AND_W_R, "and.w-r", "and.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* and.d $Rs,$Rd */
   {
     CRIS_INSN_AND_D_R, "and.d-r", "and.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* and-m.b [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_AND_M_B_M, "and-m.b-m", "and-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* and-m.w [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_AND_M_W_M, "and-m.w-m", "and-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* and-m.d [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_AND_M_D_M, "and-m.d-m", "and-m.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* and.b ${sconst8}],${Rd} */
   {
     CRIS_INSN_ANDCBR, "andcbr", "and.b", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* and.w ${sconst16}],${Rd} */
   {
     CRIS_INSN_ANDCWR, "andcwr", "and.w", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* and.d ${const32}],${Rd} */
   {
     CRIS_INSN_ANDCDR, "andcdr", "and.d", 48,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* andq $i,$Rd */
   {
     CRIS_INSN_ANDQ, "andq", "andq", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* orr.b $Rs,$Rd */
   {
     CRIS_INSN_ORR_B_R, "orr.b-r", "orr.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* orr.w $Rs,$Rd */
   {
     CRIS_INSN_ORR_W_R, "orr.w-r", "orr.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* orr.d $Rs,$Rd */
   {
     CRIS_INSN_ORR_D_R, "orr.d-r", "orr.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* or-m.b [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_OR_M_B_M, "or-m.b-m", "or-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* or-m.w [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_OR_M_W_M, "or-m.w-m", "or-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* or-m.d [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_OR_M_D_M, "or-m.d-m", "or-m.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* or.b ${sconst8}],${Rd} */
   {
     CRIS_INSN_ORCBR, "orcbr", "or.b", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* or.w ${sconst16}],${Rd} */
   {
     CRIS_INSN_ORCWR, "orcwr", "or.w", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* or.d ${const32}],${Rd} */
   {
     CRIS_INSN_ORCDR, "orcdr", "or.d", 48,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* orq $i,$Rd */
   {
     CRIS_INSN_ORQ, "orq", "orq", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* xor $Rs,$Rd */
   {
     CRIS_INSN_XOR, "xor", "xor", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* not ${Rs} */
   {
     CRIS_INSN_NOT, "not", "not", 16,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3), 0 } } } }
   },
 /* swap${swapoption} ${Rs} */
   {
     CRIS_INSN_SWAP, "swap", "swap", 16,
-    { 0, { (1<<MACH_CRISV8)|(1<<MACH_CRISV10)|(1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV8)|(1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } }
   },
 /* asrr.b $Rs,$Rd */
   {
     CRIS_INSN_ASRR_B_R, "asrr.b-r", "asrr.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* asrr.w $Rs,$Rd */
   {
     CRIS_INSN_ASRR_W_R, "asrr.w-r", "asrr.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* asrr.d $Rs,$Rd */
   {
     CRIS_INSN_ASRR_D_R, "asrr.d-r", "asrr.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* asrq $c,${Rd} */
   {
     CRIS_INSN_ASRQ, "asrq", "asrq", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* lsrr.b $Rs,$Rd */
   {
     CRIS_INSN_LSRR_B_R, "lsrr.b-r", "lsrr.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* lsrr.w $Rs,$Rd */
   {
     CRIS_INSN_LSRR_W_R, "lsrr.w-r", "lsrr.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* lsrr.d $Rs,$Rd */
   {
     CRIS_INSN_LSRR_D_R, "lsrr.d-r", "lsrr.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* lsrq $c,${Rd} */
   {
     CRIS_INSN_LSRQ, "lsrq", "lsrq", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* lslr.b $Rs,$Rd */
   {
     CRIS_INSN_LSLR_B_R, "lslr.b-r", "lslr.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* lslr.w $Rs,$Rd */
   {
     CRIS_INSN_LSLR_W_R, "lslr.w-r", "lslr.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* lslr.d $Rs,$Rd */
   {
     CRIS_INSN_LSLR_D_R, "lslr.d-r", "lslr.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* lslq $c,${Rd} */
   {
     CRIS_INSN_LSLQ, "lslq", "lslq", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* $Rs,$Rd */
   {
     CRIS_INSN_BTST, "btst", "", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* btstq $c,${Rd} */
   {
     CRIS_INSN_BTSTQ, "btstq", "btstq", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* setf ${list-of-flags} */
   {
     CRIS_INSN_SETF, "setf", "setf", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* clearf ${list-of-flags} */
   {
     CRIS_INSN_CLEARF, "clearf", "clearf", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* rfe */
   {
     CRIS_INSN_RFE, "rfe", "rfe", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* sfe */
   {
     CRIS_INSN_SFE, "sfe", "sfe", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* rfg */
   {
     CRIS_INSN_RFG, "rfg", "rfg", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* rfn */
   {
     CRIS_INSN_RFN, "rfn", "rfn", 16,
-    { 0, { (1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* halt */
   {
     CRIS_INSN_HALT, "halt", "halt", 16,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV32) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* b${cc} ${o-pcrel} */
   {
     CRIS_INSN_BCC_B, "bcc-b", "b", 16,
-    { 0|A(COND_CTI)|A(DELAY_SLOT), { (1<<MACH_BASE) } }
+    { 0|A(COND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } } } }
   },
 /* ba ${o-pcrel} */
   {
     CRIS_INSN_BA_B, "ba-b", "ba", 16,
-    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { (1<<MACH_BASE) } }
+    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } } } }
   },
 /* b${cc} ${o-word-pcrel} */
   {
     CRIS_INSN_BCC_W, "bcc-w", "b", 32,
-    { 0|A(COND_CTI)|A(DELAY_SLOT), { (1<<MACH_BASE) } }
+    { 0|A(COND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } } } }
   },
 /* ba ${o-word-pcrel} */
   {
     CRIS_INSN_BA_W, "ba-w", "ba", 32,
-    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { (1<<MACH_BASE) } }
+    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_BASE), 0 } } } }
   },
 /* jas ${Rs},${Pd} */
   {
     CRIS_INSN_JAS_R, "jas-r", "jas", 16,
-    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { (1<<MACH_CRISV32) } }
+    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* jump/jsr/jir ${Rs} */
   {
     CRIS_INSN_JUMP_R, "jump-r", "jump/jsr/jir", 16,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* jas ${const32},${Pd} */
   {
     CRIS_INSN_JAS_C, "jas-c", "jas", 48,
-    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { (1<<MACH_CRISV32) } }
+    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* jump/jsr/jir [${Rs}${inc}] */
   {
     CRIS_INSN_JUMP_M, "jump-m", "jump/jsr/jir", 16,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* jump/jsr/jir ${const32} */
   {
     CRIS_INSN_JUMP_C, "jump-c", "jump/jsr/jir", 48,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* jump ${Ps} */
   {
     CRIS_INSN_JUMP_P, "jump-p", "jump", 16,
-    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { (1<<MACH_CRISV32) } }
+    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* bas ${const32},${Pd} */
   {
     CRIS_INSN_BAS_C, "bas-c", "bas", 48,
-    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { (1<<MACH_CRISV32) } }
+    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* jasc ${Rs},${Pd} */
   {
     CRIS_INSN_JASC_R, "jasc-r", "jasc", 16,
-    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { (1<<MACH_CRISV32) } }
+    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* jasc ${const32},${Pd} */
   {
     CRIS_INSN_JASC_C, "jasc-c", "jasc", 48,
-    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { (1<<MACH_CRISV32) } }
+    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* basc ${const32},${Pd} */
   {
     CRIS_INSN_BASC_C, "basc-c", "basc", 48,
-    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { (1<<MACH_CRISV32) } }
+    { 0|A(UNCOND_CTI)|A(DELAY_SLOT), { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* break $n */
   {
     CRIS_INSN_BREAK, "break", "break", 16,
-    { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } } } }
   },
 /* bound-r.b ${Rs},${Rd} */
   {
     CRIS_INSN_BOUND_R_B_R, "bound-r.b-r", "bound-r.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* bound-r.w ${Rs},${Rd} */
   {
     CRIS_INSN_BOUND_R_W_R, "bound-r.w-r", "bound-r.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* bound-r.d ${Rs},${Rd} */
   {
     CRIS_INSN_BOUND_R_D_R, "bound-r.d-r", "bound-r.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* bound-m.b [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_BOUND_M_B_M, "bound-m.b-m", "bound-m.b", 16,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* bound-m.w [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_BOUND_M_W_M, "bound-m.w-m", "bound-m.w", 16,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* bound-m.d [${Rs}${inc}],${Rd} */
   {
     CRIS_INSN_BOUND_M_D_M, "bound-m.d-m", "bound-m.d", 16,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* bound.b [PC+],${Rd} */
   {
     CRIS_INSN_BOUND_CB, "bound-cb", "bound.b", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* bound.w [PC+],${Rd} */
   {
     CRIS_INSN_BOUND_CW, "bound-cw", "bound.w", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* bound.d [PC+],${Rd} */
   {
     CRIS_INSN_BOUND_CD, "bound-cd", "bound.d", 48,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* s${cc} ${Rd-sfield} */
   {
     CRIS_INSN_SCC, "scc", "s", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* lz ${Rs},${Rd} */
   {
     CRIS_INSN_LZ, "lz", "lz", 16,
-    { 0, { (1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10)|(1<<MACH_CRISV32) } }
+    { 0, { { { (1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10)|(1<<MACH_CRISV32), 0 } } } }
   },
 /* addoq $o,$Rs,ACR */
   {
     CRIS_INSN_ADDOQ, "addoq", "addoq", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* bdapq $o,PC */
   {
     CRIS_INSN_BDAPQPC, "bdapqpc", "bdapq", 16,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* addo-m.b [${Rs}${inc}],$Rd,ACR */
   {
     CRIS_INSN_ADDO_M_B_M, "addo-m.b-m", "addo-m.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addo-m.w [${Rs}${inc}],$Rd,ACR */
   {
     CRIS_INSN_ADDO_M_W_M, "addo-m.w-m", "addo-m.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addo-m.d [${Rs}${inc}],$Rd,ACR */
   {
     CRIS_INSN_ADDO_M_D_M, "addo-m.d-m", "addo-m.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addo.b [PC+],$Rd,ACR */
   {
     CRIS_INSN_ADDO_CB, "addo-cb", "addo.b", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addo.w [PC+],$Rd,ACR */
   {
     CRIS_INSN_ADDO_CW, "addo-cw", "addo.w", 32,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addo.d [PC+],$Rd,ACR */
   {
     CRIS_INSN_ADDO_CD, "addo-cd", "addo.d", 48,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* dip [${Rs}${inc}] */
   {
     CRIS_INSN_DIP_M, "dip-m", "dip", 16,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* dip [PC+] */
   {
     CRIS_INSN_DIP_C, "dip-c", "dip", 48,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* addi-acr.b ${Rs-dfield}.m,${Rd-sfield},ACR */
   {
     CRIS_INSN_ADDI_ACR_B_R, "addi-acr.b-r", "addi-acr.b", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addi-acr.w ${Rs-dfield}.m,${Rd-sfield},ACR */
   {
     CRIS_INSN_ADDI_ACR_W_R, "addi-acr.w-r", "addi-acr.w", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* addi-acr.d ${Rs-dfield}.m,${Rd-sfield},ACR */
   {
     CRIS_INSN_ADDI_ACR_D_R, "addi-acr.d-r", "addi-acr.d", 16,
-    { 0, { (1<<MACH_BASE) } }
+    { 0, { { { (1<<MACH_BASE), 0 } } } }
   },
 /* biap-pc.b ${Rs-dfield}.m,PC */
   {
     CRIS_INSN_BIAP_PC_B_R, "biap-pc.b-r", "biap-pc.b", 16,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* biap-pc.w ${Rs-dfield}.m,PC */
   {
     CRIS_INSN_BIAP_PC_W_R, "biap-pc.w-r", "biap-pc.w", 16,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* biap-pc.d ${Rs-dfield}.m,PC */
   {
     CRIS_INSN_BIAP_PC_D_R, "biap-pc.d-r", "biap-pc.d", 16,
-    { 0, { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10) } }
+    { 0, { { { (1<<MACH_CRISV0)|(1<<MACH_CRISV3)|(1<<MACH_CRISV8)|(1<<MACH_CRISV10), 0 } } } }
   },
 /* fidxi [$Rs] */
   {
     CRIS_INSN_FIDXI, "fidxi", "fidxi", 16,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV32) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* fidxi [$Rs] */
   {
     CRIS_INSN_FTAGI, "ftagi", "fidxi", 16,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV32) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* fidxd [$Rs] */
   {
     CRIS_INSN_FIDXD, "fidxd", "fidxd", 16,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV32) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV32), 0 } } } }
   },
 /* ftagd [$Rs] */
   {
     CRIS_INSN_FTAGD, "ftagd", "ftagd", 16,
-    { 0|A(UNCOND_CTI), { (1<<MACH_CRISV32) } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_CRISV32), 0 } } } }
   },
 };
 
@@ -2550,27 +2550,23 @@ static const CGEN_IBASE cris_cgen_insn_table[MAX_INSNS] =
 #undef A
 
 /* Initialize anything needed to be done once, before any cpu_open call.  */
-static void init_tables PARAMS ((void));
 
 static void
-init_tables ()
+init_tables (void)
 {
 }
 
-static const CGEN_MACH * lookup_mach_via_bfd_name
-  PARAMS ((const CGEN_MACH *, const char *));
-static void build_hw_table  PARAMS ((CGEN_CPU_TABLE *));
-static void build_ifield_table  PARAMS ((CGEN_CPU_TABLE *));
-static void build_operand_table PARAMS ((CGEN_CPU_TABLE *));
-static void build_insn_table    PARAMS ((CGEN_CPU_TABLE *));
-static void cris_cgen_rebuild_tables PARAMS ((CGEN_CPU_TABLE *));
+static const CGEN_MACH * lookup_mach_via_bfd_name (const CGEN_MACH *, const char *);
+static void build_hw_table      (CGEN_CPU_TABLE *);
+static void build_ifield_table  (CGEN_CPU_TABLE *);
+static void build_operand_table (CGEN_CPU_TABLE *);
+static void build_insn_table    (CGEN_CPU_TABLE *);
+static void cris_cgen_rebuild_tables (CGEN_CPU_TABLE *);
 
 /* Subroutine of cris_cgen_cpu_open to look up a mach via its bfd name.  */
 
 static const CGEN_MACH *
-lookup_mach_via_bfd_name (table, name)
-     const CGEN_MACH *table;
-     const char *name;
+lookup_mach_via_bfd_name (const CGEN_MACH *table, const char *name)
 {
   while (table->name)
     {
@@ -2584,8 +2580,7 @@ lookup_mach_via_bfd_name (table, name)
 /* Subroutine of cris_cgen_cpu_open to build the hardware table.  */
 
 static void
-build_hw_table (cd)
-     CGEN_CPU_TABLE *cd;
+build_hw_table (CGEN_CPU_TABLE *cd)
 {
   int i;
   int machs = cd->machs;
@@ -2611,8 +2606,7 @@ build_hw_table (cd)
 /* Subroutine of cris_cgen_cpu_open to build the hardware table.  */
 
 static void
-build_ifield_table (cd)
-     CGEN_CPU_TABLE *cd;
+build_ifield_table (CGEN_CPU_TABLE *cd)
 {
   cd->ifld_table = & cris_cgen_ifld_table[0];
 }
@@ -2620,8 +2614,7 @@ build_ifield_table (cd)
 /* Subroutine of cris_cgen_cpu_open to build the hardware table.  */
 
 static void
-build_operand_table (cd)
-     CGEN_CPU_TABLE *cd;
+build_operand_table (CGEN_CPU_TABLE *cd)
 {
   int i;
   int machs = cd->machs;
@@ -2629,8 +2622,7 @@ build_operand_table (cd)
   /* MAX_OPERANDS is only an upper bound on the number of selected entries.
      However each entry is indexed by it's enum so there can be holes in
      the table.  */
-  const CGEN_OPERAND **selected =
-    (const CGEN_OPERAND **) xmalloc (MAX_OPERANDS * sizeof (CGEN_OPERAND *));
+  const CGEN_OPERAND **selected = xmalloc (MAX_OPERANDS * sizeof (* selected));
 
   cd->operand_table.init_entries = init;
   cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
@@ -2653,12 +2645,11 @@ build_operand_table (cd)
    operand elements to be in the table [which they mightn't be].  */
 
 static void
-build_insn_table (cd)
-     CGEN_CPU_TABLE *cd;
+build_insn_table (CGEN_CPU_TABLE *cd)
 {
   int i;
   const CGEN_IBASE *ib = & cris_cgen_insn_table[0];
-  CGEN_INSN *insns = (CGEN_INSN *) xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
+  CGEN_INSN *insns = xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
 
   memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
   for (i = 0; i < MAX_INSNS; ++i)
@@ -2671,11 +2662,10 @@ build_insn_table (cd)
 /* Subroutine of cris_cgen_cpu_open to rebuild the tables.  */
 
 static void
-cris_cgen_rebuild_tables (cd)
-     CGEN_CPU_TABLE *cd;
+cris_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
 {
   int i;
-  unsigned int isas = cd->isas;
+  CGEN_BITSET *isas = cd->isas;
   unsigned int machs = cd->machs;
 
   cd->int_insn_p = CGEN_INT_INSN_P;
@@ -2684,10 +2674,10 @@ cris_cgen_rebuild_tables (cd)
 #define UNSET (CGEN_SIZE_UNKNOWN + 1)
   cd->default_insn_bitsize = UNSET;
   cd->base_insn_bitsize = UNSET;
-  cd->min_insn_bitsize = 65535; /* some ridiculously big number */
+  cd->min_insn_bitsize = 65535; /* Some ridiculously big number.  */
   cd->max_insn_bitsize = 0;
   for (i = 0; i < MAX_ISAS; ++i)
-    if (((1 << i) & isas) != 0)
+    if (cgen_bitset_contains (isas, i))
       {
 	const CGEN_ISA *isa = & cris_cgen_isa_table[i];
 
@@ -2696,7 +2686,7 @@ cris_cgen_rebuild_tables (cd)
 	if (cd->default_insn_bitsize == UNSET)
 	  cd->default_insn_bitsize = isa->default_insn_bitsize;
 	else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
-	  ; /* this is ok */
+	  ; /* This is ok.  */
 	else
 	  cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
 
@@ -2705,7 +2695,7 @@ cris_cgen_rebuild_tables (cd)
 	if (cd->base_insn_bitsize == UNSET)
 	  cd->base_insn_bitsize = isa->base_insn_bitsize;
 	else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
-	  ; /* this is ok */
+	  ; /* This is ok.  */
 	else
 	  cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
 
@@ -2772,7 +2762,7 @@ cris_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
 {
   CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
   static int init_p;
-  unsigned int isas = 0;  /* 0 = "unspecified" */
+  CGEN_BITSET *isas = 0;  /* 0 = "unspecified" */
   unsigned int machs = 0; /* 0 = "unspecified" */
   enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
   va_list ap;
@@ -2791,7 +2781,7 @@ cris_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
       switch (arg_type)
 	{
 	case CGEN_CPU_OPEN_ISAS :
-	  isas = va_arg (ap, unsigned int);
+	  isas = va_arg (ap, CGEN_BITSET *);
 	  break;
 	case CGEN_CPU_OPEN_MACHS :
 	  machs = va_arg (ap, unsigned int);
@@ -2817,14 +2807,11 @@ cris_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
     }
   va_end (ap);
 
-  /* mach unspecified means "all" */
+  /* Mach unspecified means "all".  */
   if (machs == 0)
     machs = (1 << MAX_MACHS) - 1;
-  /* base mach is always selected */
+  /* Base mach is always selected.  */
   machs |= 1;
-  /* isa unspecified means "all" */
-  if (isas == 0)
-    isas = (1 << MAX_ISAS) - 1;
   if (endian == CGEN_ENDIAN_UNKNOWN)
     {
       /* ??? If target has only one, could have a default.  */
@@ -2832,7 +2819,7 @@ cris_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
       abort ();
     }
 
-  cd->isas = isas;
+  cd->isas = cgen_bitset_copy (isas);
   cd->machs = machs;
   cd->endian = endian;
   /* FIXME: for the sparc case we can determine insn-endianness statically.
@@ -2855,9 +2842,7 @@ cris_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
    MACH_NAME is the bfd name of the mach.  */
 
 CGEN_CPU_DESC
-cris_cgen_cpu_open_1 (mach_name, endian)
-     const char *mach_name;
-     enum cgen_endian endian;
+cris_cgen_cpu_open_1 (const char *mach_name, enum cgen_endian endian)
 {
   return cris_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
 			       CGEN_CPU_OPEN_ENDIAN, endian,
@@ -2870,8 +2855,7 @@ cris_cgen_cpu_open_1 (mach_name, endian)
    place as some simulator ports use this but they don't use libopcodes.  */
 
 void
-cris_cgen_cpu_close (cd)
-     CGEN_CPU_DESC cd;
+cris_cgen_cpu_close (CGEN_CPU_DESC cd)
 {
   unsigned int i;
   const CGEN_INSN *insns;
@@ -2880,23 +2864,17 @@ cris_cgen_cpu_close (cd)
     {
       insns = cd->macro_insn_table.init_entries;
       for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
-	{
-	  if (CGEN_INSN_RX ((insns)))
-	    regfree (CGEN_INSN_RX (insns));
-	}
+	if (CGEN_INSN_RX ((insns)))
+	  regfree (CGEN_INSN_RX (insns));
     }
 
   if (cd->insn_table.init_entries)
     {
       insns = cd->insn_table.init_entries;
       for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
-	{
-	  if (CGEN_INSN_RX (insns))
-	    regfree (CGEN_INSN_RX (insns));
-	}
-    }
-
-  
+	if (CGEN_INSN_RX (insns))
+	  regfree (CGEN_INSN_RX (insns));
+    }  
 
   if (cd->macro_insn_table.init_entries)
     free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
diff --git a/sim/cris/cris-desc.h b/sim/cris/cris-desc.h
index 20b11ee..dc025a1 100644
--- a/sim/cris/cris-desc.h
+++ b/sim/cris/cris-desc.h
@@ -18,13 +18,15 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
 #ifndef CRIS_CPU_H
 #define CRIS_CPU_H
 
+#include "opcode/cgen-bitset.h"
+
 #define CGEN_ARCH cris
 
 /* Given symbol S, return cris_cgen_<S>.  */
@@ -233,6 +235,15 @@ typedef enum cgen_ifld_attr {
 /* Number of non-boolean elements in cgen_ifld_attr.  */
 #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1)
 
+/* cgen_ifld attribute accessor macros.  */
+#define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_VIRTUAL)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_PCREL_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_ABS_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_RESERVED)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGN_OPT)) != 0)
+#define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_IFLD_SIGNED)) != 0)
+
 /* Enum declaration for cris ifield types.  */
 typedef enum ifield_type {
   CRIS_F_NIL, CRIS_F_ANYOF, CRIS_F_OPERAND1, CRIS_F_SIZE
@@ -257,6 +268,13 @@ typedef enum cgen_hw_attr {
 /* Number of non-boolean elements in cgen_hw_attr.  */
 #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1)
 
+/* cgen_hw attribute accessor macros.  */
+#define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_VIRTUAL)) != 0)
+#define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_CACHE_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PC)) != 0)
+#define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_HW_PROFILE)) != 0)
+
 /* Enum declaration for cris hardware types.  */
 typedef enum cgen_hw_type {
   HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
@@ -287,6 +305,17 @@ typedef enum cgen_operand_attr {
 /* Number of non-boolean elements in cgen_operand_attr.  */
 #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1)
 
+/* cgen_operand attribute accessor macros.  */
+#define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_VIRTUAL)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_ABS_ADDR)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGN_OPT)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SIGNED)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_NEGATIVE)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_RELAX)) != 0)
+#define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool & (1 << CGEN_OPERAND_SEM_ONLY)) != 0)
+
 /* Enum declaration for cris operand types.  */
 typedef enum cgen_operand_type {
   CRIS_OPERAND_PC, CRIS_OPERAND_CBIT, CRIS_OPERAND_CBIT_MOVE, CRIS_OPERAND_VBIT
@@ -321,6 +350,19 @@ typedef enum cgen_insn_attr {
 /* Number of non-boolean elements in cgen_insn_attr.  */
 #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
 
+/* cgen_insn attribute accessor macros.  */
+#define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0)
+#define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0)
+#define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0)
+#define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_COND_CTI)) != 0)
+#define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_SKIP_CTI)) != 0)
+#define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_DELAY_SLOT)) != 0)
+#define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXABLE)) != 0)
+#define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_RELAXED)) != 0)
+#define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_NO_DIS)) != 0)
+#define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_PBB)) != 0)
+
 /* cgen.h uses things we just defined.  */
 #include "opcode/cgen.h"
 
diff --git a/sim/cris/cris-opc.h b/sim/cris/cris-opc.h
index d8f425f..b0f83c3 100644
--- a/sim/cris/cris-opc.h
+++ b/sim/cris/cris-opc.h
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/decodev10.c b/sim/cris/decodev10.c
index b83022a..f07f00d 100644
--- a/sim/cris/decodev10.c
+++ b/sim/cris/decodev10.c
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -364,8 +364,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 15 : itype = CRISV10F_INSN_BCC_B; goto extract_sfmt_bcc_b;
-          case 14 : itype = CRISV10F_INSN_BA_B; goto extract_sfmt_ba_b;
+          case 15 :
+            if ((base_insn & 0xf00) == 0x0)
+              { itype = CRISV10F_INSN_BCC_B; goto extract_sfmt_bcc_b; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 14 :
+            if ((base_insn & 0xff00) == 0xe000)
+              { itype = CRISV10F_INSN_BA_B; goto extract_sfmt_ba_b; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -403,59 +409,143 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADDOQ; goto extract_sfmt_addoq;
-          case 15 : itype = CRISV10F_INSN_BDAPQPC; goto extract_sfmt_bdapqpc;
+          case 14 :
+            if ((base_insn & 0xf00) == 0x100)
+              { itype = CRISV10F_INSN_ADDOQ; goto extract_sfmt_addoq; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xff00) == 0xf100)
+              { itype = CRISV10F_INSN_BDAPQPC; goto extract_sfmt_bdapqpc; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 32 : /* fall through */
       case 33 : /* fall through */
       case 34 : /* fall through */
-      case 35 : itype = CRISV10F_INSN_ADDQ; goto extract_sfmt_addq;
+      case 35 :
+        if ((base_insn & 0xfc0) == 0x200)
+          { itype = CRISV10F_INSN_ADDQ; goto extract_sfmt_addq; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 36 : /* fall through */
       case 37 : /* fall through */
       case 38 : /* fall through */
-      case 39 : itype = CRISV10F_INSN_MOVEQ; goto extract_sfmt_moveq;
+      case 39 :
+        if ((base_insn & 0xfc0) == 0x240)
+          { itype = CRISV10F_INSN_MOVEQ; goto extract_sfmt_moveq; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 40 : /* fall through */
       case 41 : /* fall through */
       case 42 : /* fall through */
-      case 43 : itype = CRISV10F_INSN_SUBQ; goto extract_sfmt_addq;
+      case 43 :
+        if ((base_insn & 0xfc0) == 0x280)
+          { itype = CRISV10F_INSN_SUBQ; goto extract_sfmt_addq; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 44 : /* fall through */
       case 45 : /* fall through */
       case 46 : /* fall through */
-      case 47 : itype = CRISV10F_INSN_CMPQ; goto extract_sfmt_cmpq;
+      case 47 :
+        if ((base_insn & 0xfc0) == 0x2c0)
+          { itype = CRISV10F_INSN_CMPQ; goto extract_sfmt_cmpq; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 48 : /* fall through */
       case 49 : /* fall through */
       case 50 : /* fall through */
-      case 51 : itype = CRISV10F_INSN_ANDQ; goto extract_sfmt_andq;
+      case 51 :
+        if ((base_insn & 0xfc0) == 0x300)
+          { itype = CRISV10F_INSN_ANDQ; goto extract_sfmt_andq; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 52 : /* fall through */
       case 53 : /* fall through */
       case 54 : /* fall through */
-      case 55 : itype = CRISV10F_INSN_ORQ; goto extract_sfmt_andq;
+      case 55 :
+        if ((base_insn & 0xfc0) == 0x340)
+          { itype = CRISV10F_INSN_ORQ; goto extract_sfmt_andq; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 56 : /* fall through */
-      case 57 : itype = CRISV10F_INSN_BTSTQ; goto extract_sfmt_btstq;
+      case 57 :
+        if ((base_insn & 0xfe0) == 0x380)
+          { itype = CRISV10F_INSN_BTSTQ; goto extract_sfmt_btstq; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 58 : /* fall through */
-      case 59 : itype = CRISV10F_INSN_ASRQ; goto extract_sfmt_asrq;
+      case 59 :
+        if ((base_insn & 0xfe0) == 0x3a0)
+          { itype = CRISV10F_INSN_ASRQ; goto extract_sfmt_asrq; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 60 : /* fall through */
-      case 61 : itype = CRISV10F_INSN_LSLQ; goto extract_sfmt_asrq;
+      case 61 :
+        if ((base_insn & 0xfe0) == 0x3c0)
+          { itype = CRISV10F_INSN_LSLQ; goto extract_sfmt_asrq; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 62 : /* fall through */
-      case 63 : itype = CRISV10F_INSN_LSRQ; goto extract_sfmt_asrq;
-      case 64 : itype = CRISV10F_INSN_ADDU_B_R; goto extract_sfmt_add_d_r;
-      case 65 : itype = CRISV10F_INSN_ADDU_W_R; goto extract_sfmt_add_d_r;
-      case 66 : itype = CRISV10F_INSN_ADDS_B_R; goto extract_sfmt_add_d_r;
-      case 67 : itype = CRISV10F_INSN_ADDS_W_R; goto extract_sfmt_add_d_r;
-      case 68 : itype = CRISV10F_INSN_MOVU_B_R; goto extract_sfmt_movs_b_r;
-      case 69 : itype = CRISV10F_INSN_MOVU_W_R; goto extract_sfmt_movs_b_r;
-      case 70 : itype = CRISV10F_INSN_MOVS_B_R; goto extract_sfmt_movs_b_r;
-      case 71 : itype = CRISV10F_INSN_MOVS_W_R; goto extract_sfmt_movs_b_r;
-      case 72 : itype = CRISV10F_INSN_SUBU_B_R; goto extract_sfmt_add_d_r;
-      case 73 : itype = CRISV10F_INSN_SUBU_W_R; goto extract_sfmt_add_d_r;
-      case 74 : itype = CRISV10F_INSN_SUBS_B_R; goto extract_sfmt_add_d_r;
-      case 75 : itype = CRISV10F_INSN_SUBS_W_R; goto extract_sfmt_add_d_r;
-      case 76 : itype = CRISV10F_INSN_LSLR_B_R; goto extract_sfmt_lsrr_b_r;
-      case 77 : itype = CRISV10F_INSN_LSLR_W_R; goto extract_sfmt_lsrr_b_r;
-      case 78 : itype = CRISV10F_INSN_LSLR_D_R; goto extract_sfmt_lsrr_d_r;
-      case 79 : itype = CRISV10F_INSN_BTST; goto extract_sfmt_btst;
+      case 63 :
+        if ((base_insn & 0xfe0) == 0x3e0)
+          { itype = CRISV10F_INSN_LSRQ; goto extract_sfmt_asrq; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 64 :
+        if ((base_insn & 0xff0) == 0x400)
+          { itype = CRISV10F_INSN_ADDU_B_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 65 :
+        if ((base_insn & 0xff0) == 0x410)
+          { itype = CRISV10F_INSN_ADDU_W_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 66 :
+        if ((base_insn & 0xff0) == 0x420)
+          { itype = CRISV10F_INSN_ADDS_B_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 67 :
+        if ((base_insn & 0xff0) == 0x430)
+          { itype = CRISV10F_INSN_ADDS_W_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 68 :
+        if ((base_insn & 0xff0) == 0x440)
+          { itype = CRISV10F_INSN_MOVU_B_R; goto extract_sfmt_movs_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 69 :
+        if ((base_insn & 0xff0) == 0x450)
+          { itype = CRISV10F_INSN_MOVU_W_R; goto extract_sfmt_movs_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 70 :
+        if ((base_insn & 0xff0) == 0x460)
+          { itype = CRISV10F_INSN_MOVS_B_R; goto extract_sfmt_movs_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 71 :
+        if ((base_insn & 0xff0) == 0x470)
+          { itype = CRISV10F_INSN_MOVS_W_R; goto extract_sfmt_movs_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 72 :
+        if ((base_insn & 0xff0) == 0x480)
+          { itype = CRISV10F_INSN_SUBU_B_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 73 :
+        if ((base_insn & 0xff0) == 0x490)
+          { itype = CRISV10F_INSN_SUBU_W_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 74 :
+        if ((base_insn & 0xff0) == 0x4a0)
+          { itype = CRISV10F_INSN_SUBS_B_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 75 :
+        if ((base_insn & 0xff0) == 0x4b0)
+          { itype = CRISV10F_INSN_SUBS_W_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 76 :
+        if ((base_insn & 0xff0) == 0x4c0)
+          { itype = CRISV10F_INSN_LSLR_B_R; goto extract_sfmt_lsrr_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 77 :
+        if ((base_insn & 0xff0) == 0x4d0)
+          { itype = CRISV10F_INSN_LSLR_W_R; goto extract_sfmt_lsrr_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 78 :
+        if ((base_insn & 0xff0) == 0x4e0)
+          { itype = CRISV10F_INSN_LSLR_D_R; goto extract_sfmt_lsrr_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 79 :
+        if ((base_insn & 0xff0) == 0x4f0)
+          { itype = CRISV10F_INSN_BTST; goto extract_sfmt_btst; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 80 :
         {
           unsigned int val = (((insn >> 8) & (7 << 4)) | ((insn >> 0) & (15 << 0)));
@@ -587,23 +677,41 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 124 : /* fall through */
           case 125 : /* fall through */
           case 126 : /* fall through */
-          case 127 : itype = CRISV10F_INSN_ADDI_B_R; goto extract_sfmt_addi_b_r;
+          case 127 :
+            if ((base_insn & 0xff0) == 0x500)
+              { itype = CRISV10F_INSN_ADDI_B_R; goto extract_sfmt_addi_b_r; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           case 15 :
             {
               unsigned int val = (((insn >> 15) & (1 << 0)));
               switch (val)
               {
-              case 0 : itype = CRISV10F_INSN_NOP; goto extract_sfmt_nop;
-              case 1 : itype = CRISV10F_INSN_ADDI_B_R; goto extract_sfmt_addi_b_r;
+              case 0 :
+                if ((base_insn & 0xffff) == 0x50f)
+                  { itype = CRISV10F_INSN_NOP; goto extract_sfmt_nop; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 1 :
+                if ((base_insn & 0xff0) == 0x500)
+                  { itype = CRISV10F_INSN_ADDI_B_R; goto extract_sfmt_addi_b_r; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 81 : itype = CRISV10F_INSN_ADDI_W_R; goto extract_sfmt_addi_b_r;
-      case 82 : itype = CRISV10F_INSN_ADDI_D_R; goto extract_sfmt_addi_b_r;
-      case 83 : itype = CRISV10F_INSN_SCC; goto extract_sfmt_scc;
+      case 81 :
+        if ((base_insn & 0xff0) == 0x510)
+          { itype = CRISV10F_INSN_ADDI_W_R; goto extract_sfmt_addi_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 82 :
+        if ((base_insn & 0xff0) == 0x520)
+          { itype = CRISV10F_INSN_ADDI_D_R; goto extract_sfmt_addi_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 83 :
+        if ((base_insn & 0xff0) == 0x530)
+          { itype = CRISV10F_INSN_SCC; goto extract_sfmt_scc; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 84 :
         {
           unsigned int val = (((insn >> 0) & (15 << 0)));
@@ -623,8 +731,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADDI_ACR_B_R; goto extract_sfmt_addi_acr_b_r;
-          case 15 : itype = CRISV10F_INSN_BIAP_PC_B_R; goto extract_sfmt_biap_pc_b_r;
+          case 14 :
+            if ((base_insn & 0xff0) == 0x540)
+              { itype = CRISV10F_INSN_ADDI_ACR_B_R; goto extract_sfmt_addi_acr_b_r; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0x54f)
+              { itype = CRISV10F_INSN_BIAP_PC_B_R; goto extract_sfmt_biap_pc_b_r; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -647,8 +761,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADDI_ACR_W_R; goto extract_sfmt_addi_acr_b_r;
-          case 15 : itype = CRISV10F_INSN_BIAP_PC_W_R; goto extract_sfmt_biap_pc_b_r;
+          case 14 :
+            if ((base_insn & 0xff0) == 0x550)
+              { itype = CRISV10F_INSN_ADDI_ACR_W_R; goto extract_sfmt_addi_acr_b_r; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0x55f)
+              { itype = CRISV10F_INSN_BIAP_PC_W_R; goto extract_sfmt_biap_pc_b_r; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -671,25 +791,73 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADDI_ACR_D_R; goto extract_sfmt_addi_acr_b_r;
-          case 15 : itype = CRISV10F_INSN_BIAP_PC_D_R; goto extract_sfmt_biap_pc_b_r;
+          case 14 :
+            if ((base_insn & 0xff0) == 0x560)
+              { itype = CRISV10F_INSN_ADDI_ACR_D_R; goto extract_sfmt_addi_acr_b_r; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0x56f)
+              { itype = CRISV10F_INSN_BIAP_PC_D_R; goto extract_sfmt_biap_pc_b_r; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 88 : itype = CRISV10F_INSN_NEG_B_R; goto extract_sfmt_neg_b_r;
-      case 89 : itype = CRISV10F_INSN_NEG_W_R; goto extract_sfmt_neg_b_r;
-      case 90 : itype = CRISV10F_INSN_NEG_D_R; goto extract_sfmt_neg_d_r;
-      case 91 : itype = CRISV10F_INSN_SETF; goto extract_sfmt_setf;
-      case 92 : itype = CRISV10F_INSN_BOUND_R_B_R; goto extract_sfmt_dstep;
-      case 93 : itype = CRISV10F_INSN_BOUND_R_W_R; goto extract_sfmt_dstep;
-      case 94 : itype = CRISV10F_INSN_BOUND_R_D_R; goto extract_sfmt_dstep;
-      case 95 : itype = CRISV10F_INSN_CLEARF; goto extract_sfmt_setf;
-      case 96 : itype = CRISV10F_INSN_ADD_B_R; goto extract_sfmt_add_b_r;
-      case 97 : itype = CRISV10F_INSN_ADD_W_R; goto extract_sfmt_add_b_r;
-      case 98 : itype = CRISV10F_INSN_ADD_D_R; goto extract_sfmt_add_d_r;
-      case 99 : itype = CRISV10F_INSN_MOVE_R_SPRV10; goto extract_sfmt_move_r_sprv10;
-      case 100 : itype = CRISV10F_INSN_MOVE_B_R; goto extract_sfmt_move_b_r;
-      case 101 : itype = CRISV10F_INSN_MOVE_W_R; goto extract_sfmt_move_b_r;
+      case 88 :
+        if ((base_insn & 0xff0) == 0x580)
+          { itype = CRISV10F_INSN_NEG_B_R; goto extract_sfmt_neg_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 89 :
+        if ((base_insn & 0xff0) == 0x590)
+          { itype = CRISV10F_INSN_NEG_W_R; goto extract_sfmt_neg_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 90 :
+        if ((base_insn & 0xff0) == 0x5a0)
+          { itype = CRISV10F_INSN_NEG_D_R; goto extract_sfmt_neg_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 91 :
+        if ((base_insn & 0xff0) == 0x5b0)
+          { itype = CRISV10F_INSN_SETF; goto extract_sfmt_setf; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 92 :
+        if ((base_insn & 0xff0) == 0x5c0)
+          { itype = CRISV10F_INSN_BOUND_R_B_R; goto extract_sfmt_dstep; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 93 :
+        if ((base_insn & 0xff0) == 0x5d0)
+          { itype = CRISV10F_INSN_BOUND_R_W_R; goto extract_sfmt_dstep; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 94 :
+        if ((base_insn & 0xff0) == 0x5e0)
+          { itype = CRISV10F_INSN_BOUND_R_D_R; goto extract_sfmt_dstep; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 95 :
+        if ((base_insn & 0xff0) == 0x5f0)
+          { itype = CRISV10F_INSN_CLEARF; goto extract_sfmt_setf; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 96 :
+        if ((base_insn & 0xff0) == 0x600)
+          { itype = CRISV10F_INSN_ADD_B_R; goto extract_sfmt_add_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 97 :
+        if ((base_insn & 0xff0) == 0x610)
+          { itype = CRISV10F_INSN_ADD_W_R; goto extract_sfmt_add_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 98 :
+        if ((base_insn & 0xff0) == 0x620)
+          { itype = CRISV10F_INSN_ADD_D_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 99 :
+        if ((base_insn & 0xff0) == 0x630)
+          { itype = CRISV10F_INSN_MOVE_R_SPRV10; goto extract_sfmt_move_r_sprv10; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 100 :
+        if ((base_insn & 0xff0) == 0x640)
+          { itype = CRISV10F_INSN_MOVE_B_R; goto extract_sfmt_move_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 101 :
+        if ((base_insn & 0xff0) == 0x650)
+          { itype = CRISV10F_INSN_MOVE_W_R; goto extract_sfmt_move_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 102 :
         {
           unsigned int val = (((insn >> 0) & (15 << 0)));
@@ -709,8 +877,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_MOVE_D_R; goto extract_sfmt_move_d_r;
-          case 15 : itype = CRISV10F_INSN_MOVEPCR; goto extract_sfmt_movepcr;
+          case 14 :
+            if ((base_insn & 0xff0) == 0x660)
+              { itype = CRISV10F_INSN_MOVE_D_R; goto extract_sfmt_move_d_r; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0x66f)
+              { itype = CRISV10F_INSN_MOVEPCR; goto extract_sfmt_movepcr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -733,38 +907,125 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_MOVE_SPR_RV10; goto extract_sfmt_move_spr_rv10;
-          case 15 : itype = CRISV10F_INSN_RET_TYPE; goto extract_sfmt_ret_type;
+          case 14 :
+            if ((base_insn & 0xff0) == 0x670)
+              { itype = CRISV10F_INSN_MOVE_SPR_RV10; goto extract_sfmt_move_spr_rv10; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0x67f)
+              { itype = CRISV10F_INSN_RET_TYPE; goto extract_sfmt_ret_type; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 104 : itype = CRISV10F_INSN_SUB_B_R; goto extract_sfmt_add_b_r;
-      case 105 : itype = CRISV10F_INSN_SUB_W_R; goto extract_sfmt_add_b_r;
-      case 106 : itype = CRISV10F_INSN_SUB_D_R; goto extract_sfmt_add_d_r;
-      case 107 : itype = CRISV10F_INSN_ABS; goto extract_sfmt_movs_b_r;
-      case 108 : itype = CRISV10F_INSN_CMP_R_B_R; goto extract_sfmt_cmp_r_b_r;
-      case 109 : itype = CRISV10F_INSN_CMP_R_W_R; goto extract_sfmt_cmp_r_b_r;
-      case 110 : itype = CRISV10F_INSN_CMP_R_D_R; goto extract_sfmt_cmp_r_b_r;
-      case 111 : itype = CRISV10F_INSN_DSTEP; goto extract_sfmt_dstep;
-      case 112 : itype = CRISV10F_INSN_AND_B_R; goto extract_sfmt_and_b_r;
-      case 113 : itype = CRISV10F_INSN_AND_W_R; goto extract_sfmt_and_w_r;
-      case 114 : itype = CRISV10F_INSN_AND_D_R; goto extract_sfmt_and_d_r;
-      case 115 : itype = CRISV10F_INSN_LZ; goto extract_sfmt_movs_b_r;
-      case 116 : itype = CRISV10F_INSN_ORR_B_R; goto extract_sfmt_and_b_r;
-      case 117 : itype = CRISV10F_INSN_ORR_W_R; goto extract_sfmt_and_w_r;
-      case 118 : itype = CRISV10F_INSN_ORR_D_R; goto extract_sfmt_and_d_r;
-      case 119 : itype = CRISV10F_INSN_SWAP; goto extract_sfmt_swap;
-      case 120 : itype = CRISV10F_INSN_ASRR_B_R; goto extract_sfmt_asrr_b_r;
-      case 121 : itype = CRISV10F_INSN_ASRR_W_R; goto extract_sfmt_asrr_b_r;
-      case 122 : itype = CRISV10F_INSN_ASRR_D_R; goto extract_sfmt_and_d_r;
-      case 123 : itype = CRISV10F_INSN_XOR; goto extract_sfmt_dstep;
-      case 124 : itype = CRISV10F_INSN_LSRR_B_R; goto extract_sfmt_lsrr_b_r;
-      case 125 : itype = CRISV10F_INSN_LSRR_W_R; goto extract_sfmt_lsrr_b_r;
-      case 126 : itype = CRISV10F_INSN_LSRR_D_R; goto extract_sfmt_lsrr_d_r;
-      case 127 : itype = CRISV10F_INSN_MSTEP; goto extract_sfmt_mstep;
-      case 128 : itype = CRISV10F_INSN_ADDU_M_B_M; goto extract_sfmt_adds_m_b_m;
-      case 129 : itype = CRISV10F_INSN_ADDU_M_W_M; goto extract_sfmt_adds_m_w_m;
-      case 130 : itype = CRISV10F_INSN_ADDS_M_B_M; goto extract_sfmt_adds_m_b_m;
+      case 104 :
+        if ((base_insn & 0xff0) == 0x680)
+          { itype = CRISV10F_INSN_SUB_B_R; goto extract_sfmt_add_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 105 :
+        if ((base_insn & 0xff0) == 0x690)
+          { itype = CRISV10F_INSN_SUB_W_R; goto extract_sfmt_add_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 106 :
+        if ((base_insn & 0xff0) == 0x6a0)
+          { itype = CRISV10F_INSN_SUB_D_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 107 :
+        if ((base_insn & 0xff0) == 0x6b0)
+          { itype = CRISV10F_INSN_ABS; goto extract_sfmt_movs_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 108 :
+        if ((base_insn & 0xff0) == 0x6c0)
+          { itype = CRISV10F_INSN_CMP_R_B_R; goto extract_sfmt_cmp_r_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 109 :
+        if ((base_insn & 0xff0) == 0x6d0)
+          { itype = CRISV10F_INSN_CMP_R_W_R; goto extract_sfmt_cmp_r_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 110 :
+        if ((base_insn & 0xff0) == 0x6e0)
+          { itype = CRISV10F_INSN_CMP_R_D_R; goto extract_sfmt_cmp_r_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 111 :
+        if ((base_insn & 0xff0) == 0x6f0)
+          { itype = CRISV10F_INSN_DSTEP; goto extract_sfmt_dstep; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 112 :
+        if ((base_insn & 0xff0) == 0x700)
+          { itype = CRISV10F_INSN_AND_B_R; goto extract_sfmt_and_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 113 :
+        if ((base_insn & 0xff0) == 0x710)
+          { itype = CRISV10F_INSN_AND_W_R; goto extract_sfmt_and_w_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 114 :
+        if ((base_insn & 0xff0) == 0x720)
+          { itype = CRISV10F_INSN_AND_D_R; goto extract_sfmt_and_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 115 :
+        if ((base_insn & 0xff0) == 0x730)
+          { itype = CRISV10F_INSN_LZ; goto extract_sfmt_movs_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 116 :
+        if ((base_insn & 0xff0) == 0x740)
+          { itype = CRISV10F_INSN_ORR_B_R; goto extract_sfmt_and_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 117 :
+        if ((base_insn & 0xff0) == 0x750)
+          { itype = CRISV10F_INSN_ORR_W_R; goto extract_sfmt_and_w_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 118 :
+        if ((base_insn & 0xff0) == 0x760)
+          { itype = CRISV10F_INSN_ORR_D_R; goto extract_sfmt_and_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 119 :
+        if ((base_insn & 0xff0) == 0x770)
+          { itype = CRISV10F_INSN_SWAP; goto extract_sfmt_swap; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 120 :
+        if ((base_insn & 0xff0) == 0x780)
+          { itype = CRISV10F_INSN_ASRR_B_R; goto extract_sfmt_asrr_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 121 :
+        if ((base_insn & 0xff0) == 0x790)
+          { itype = CRISV10F_INSN_ASRR_W_R; goto extract_sfmt_asrr_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 122 :
+        if ((base_insn & 0xff0) == 0x7a0)
+          { itype = CRISV10F_INSN_ASRR_D_R; goto extract_sfmt_and_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 123 :
+        if ((base_insn & 0xff0) == 0x7b0)
+          { itype = CRISV10F_INSN_XOR; goto extract_sfmt_dstep; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 124 :
+        if ((base_insn & 0xff0) == 0x7c0)
+          { itype = CRISV10F_INSN_LSRR_B_R; goto extract_sfmt_lsrr_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 125 :
+        if ((base_insn & 0xff0) == 0x7d0)
+          { itype = CRISV10F_INSN_LSRR_W_R; goto extract_sfmt_lsrr_b_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 126 :
+        if ((base_insn & 0xff0) == 0x7e0)
+          { itype = CRISV10F_INSN_LSRR_D_R; goto extract_sfmt_lsrr_d_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 127 :
+        if ((base_insn & 0xff0) == 0x7f0)
+          { itype = CRISV10F_INSN_MSTEP; goto extract_sfmt_mstep; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 128 :
+        if ((base_insn & 0xbf0) == 0x800)
+          { itype = CRISV10F_INSN_ADDU_M_B_M; goto extract_sfmt_adds_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 129 :
+        if ((base_insn & 0xbf0) == 0x810)
+          { itype = CRISV10F_INSN_ADDU_M_W_M; goto extract_sfmt_adds_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 130 :
+        if ((base_insn & 0xbf0) == 0x820)
+          { itype = CRISV10F_INSN_ADDS_M_B_M; goto extract_sfmt_adds_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 131 :
         {
           unsigned int val = (((insn >> 8) & (7 << 4)) | ((insn >> 0) & (15 << 0)));
@@ -896,35 +1157,89 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 123 : /* fall through */
           case 124 : /* fall through */
           case 125 : /* fall through */
-          case 126 : itype = CRISV10F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m;
+          case 126 :
+            if ((base_insn & 0xbf0) == 0x830)
+              { itype = CRISV10F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           case 127 :
             {
               unsigned int val = (((insn >> 15) & (1 << 0)));
               switch (val)
               {
-              case 0 : itype = CRISV10F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m;
-              case 1 : itype = CRISV10F_INSN_ADDSPCPC; goto extract_sfmt_addspcpc;
+              case 0 :
+                if ((base_insn & 0xbf0) == 0x830)
+                  { itype = CRISV10F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 1 :
+                if ((base_insn & 0xffff) == 0xf83f)
+                  { itype = CRISV10F_INSN_ADDSPCPC; goto extract_sfmt_addspcpc; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 132 : itype = CRISV10F_INSN_MOVU_M_B_M; goto extract_sfmt_movs_m_b_m;
-      case 133 : itype = CRISV10F_INSN_MOVU_M_W_M; goto extract_sfmt_movs_m_w_m;
-      case 134 : itype = CRISV10F_INSN_MOVS_M_B_M; goto extract_sfmt_movs_m_b_m;
-      case 135 : itype = CRISV10F_INSN_MOVS_M_W_M; goto extract_sfmt_movs_m_w_m;
-      case 136 : itype = CRISV10F_INSN_SUBU_M_B_M; goto extract_sfmt_adds_m_b_m;
-      case 137 : itype = CRISV10F_INSN_SUBU_M_W_M; goto extract_sfmt_adds_m_w_m;
-      case 138 : itype = CRISV10F_INSN_SUBS_M_B_M; goto extract_sfmt_adds_m_b_m;
-      case 139 : itype = CRISV10F_INSN_SUBS_M_W_M; goto extract_sfmt_adds_m_w_m;
-      case 140 : itype = CRISV10F_INSN_CMPU_M_B_M; goto extract_sfmt_cmp_m_b_m;
-      case 141 : itype = CRISV10F_INSN_CMPU_M_W_M; goto extract_sfmt_cmp_m_w_m;
-      case 142 : itype = CRISV10F_INSN_CMPS_M_B_M; goto extract_sfmt_cmp_m_b_m;
-      case 143 : itype = CRISV10F_INSN_CMPS_M_W_M; goto extract_sfmt_cmp_m_w_m;
-      case 144 : itype = CRISV10F_INSN_MULU_B; goto extract_sfmt_muls_b;
-      case 145 : itype = CRISV10F_INSN_MULU_W; goto extract_sfmt_muls_b;
-      case 146 : itype = CRISV10F_INSN_MULU_D; goto extract_sfmt_muls_b;
+      case 132 :
+        if ((base_insn & 0xbf0) == 0x840)
+          { itype = CRISV10F_INSN_MOVU_M_B_M; goto extract_sfmt_movs_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 133 :
+        if ((base_insn & 0xbf0) == 0x850)
+          { itype = CRISV10F_INSN_MOVU_M_W_M; goto extract_sfmt_movs_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 134 :
+        if ((base_insn & 0xbf0) == 0x860)
+          { itype = CRISV10F_INSN_MOVS_M_B_M; goto extract_sfmt_movs_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 135 :
+        if ((base_insn & 0xbf0) == 0x870)
+          { itype = CRISV10F_INSN_MOVS_M_W_M; goto extract_sfmt_movs_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 136 :
+        if ((base_insn & 0xbf0) == 0x880)
+          { itype = CRISV10F_INSN_SUBU_M_B_M; goto extract_sfmt_adds_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 137 :
+        if ((base_insn & 0xbf0) == 0x890)
+          { itype = CRISV10F_INSN_SUBU_M_W_M; goto extract_sfmt_adds_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 138 :
+        if ((base_insn & 0xbf0) == 0x8a0)
+          { itype = CRISV10F_INSN_SUBS_M_B_M; goto extract_sfmt_adds_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 139 :
+        if ((base_insn & 0xbf0) == 0x8b0)
+          { itype = CRISV10F_INSN_SUBS_M_W_M; goto extract_sfmt_adds_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 140 :
+        if ((base_insn & 0xbf0) == 0x8c0)
+          { itype = CRISV10F_INSN_CMPU_M_B_M; goto extract_sfmt_cmp_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 141 :
+        if ((base_insn & 0xbf0) == 0x8d0)
+          { itype = CRISV10F_INSN_CMPU_M_W_M; goto extract_sfmt_cmp_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 142 :
+        if ((base_insn & 0xbf0) == 0x8e0)
+          { itype = CRISV10F_INSN_CMPS_M_B_M; goto extract_sfmt_cmp_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 143 :
+        if ((base_insn & 0xbf0) == 0x8f0)
+          { itype = CRISV10F_INSN_CMPS_M_W_M; goto extract_sfmt_cmp_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 144 :
+        if ((base_insn & 0xff0) == 0x900)
+          { itype = CRISV10F_INSN_MULU_B; goto extract_sfmt_muls_b; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 145 :
+        if ((base_insn & 0xff0) == 0x910)
+          { itype = CRISV10F_INSN_MULU_W; goto extract_sfmt_muls_b; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 146 :
+        if ((base_insn & 0xff0) == 0x920)
+          { itype = CRISV10F_INSN_MULU_D; goto extract_sfmt_muls_b; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 147 :
         {
           unsigned int val = (((insn >> 12) & (15 << 0)));
@@ -944,48 +1259,150 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 15 : itype = CRISV10F_INSN_JUMP_M; goto extract_sfmt_jump_m;
-          case 14 : itype = CRISV10F_INSN_BREAK; goto extract_sfmt_break;
+          case 15 :
+            if ((base_insn & 0xbf0) == 0x930)
+              { itype = CRISV10F_INSN_JUMP_M; goto extract_sfmt_jump_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 14 :
+            if ((base_insn & 0xfff0) == 0xe930)
+              { itype = CRISV10F_INSN_BREAK; goto extract_sfmt_break; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 148 : itype = CRISV10F_INSN_ADDO_M_B_M; goto extract_sfmt_addo_m_b_m;
-      case 149 : itype = CRISV10F_INSN_ADDO_M_W_M; goto extract_sfmt_addo_m_w_m;
-      case 150 : itype = CRISV10F_INSN_ADDO_M_D_M; goto extract_sfmt_addo_m_d_m;
-      case 151 : itype = CRISV10F_INSN_DIP_M; goto extract_sfmt_dip_m;
-      case 155 : itype = CRISV10F_INSN_JUMP_R; goto extract_sfmt_jump_r;
-      case 156 : itype = CRISV10F_INSN_BOUND_M_B_M; goto extract_sfmt_bound_m_b_m;
-      case 157 : itype = CRISV10F_INSN_BOUND_M_W_M; goto extract_sfmt_bound_m_w_m;
-      case 158 : itype = CRISV10F_INSN_BOUND_M_D_M; goto extract_sfmt_bound_m_d_m;
-      case 160 : itype = CRISV10F_INSN_ADD_M_B_M; goto extract_sfmt_add_m_b_m;
-      case 161 : itype = CRISV10F_INSN_ADD_M_W_M; goto extract_sfmt_add_m_w_m;
-      case 162 : itype = CRISV10F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m;
-      case 163 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-      case 164 : itype = CRISV10F_INSN_MOVE_M_B_M; goto extract_sfmt_move_m_b_m;
-      case 165 : itype = CRISV10F_INSN_MOVE_M_W_M; goto extract_sfmt_move_m_w_m;
-      case 166 : itype = CRISV10F_INSN_MOVE_M_D_M; goto extract_sfmt_move_m_d_m;
+      case 148 :
+        if ((base_insn & 0xbf0) == 0x940)
+          { itype = CRISV10F_INSN_ADDO_M_B_M; goto extract_sfmt_addo_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 149 :
+        if ((base_insn & 0xbf0) == 0x950)
+          { itype = CRISV10F_INSN_ADDO_M_W_M; goto extract_sfmt_addo_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 150 :
+        if ((base_insn & 0xbf0) == 0x960)
+          { itype = CRISV10F_INSN_ADDO_M_D_M; goto extract_sfmt_addo_m_d_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 151 :
+        if ((base_insn & 0xfbf0) == 0x970)
+          { itype = CRISV10F_INSN_DIP_M; goto extract_sfmt_dip_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 155 :
+        if ((base_insn & 0xff0) == 0x9b0)
+          { itype = CRISV10F_INSN_JUMP_R; goto extract_sfmt_jump_r; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 156 :
+        if ((base_insn & 0xbf0) == 0x9c0)
+          { itype = CRISV10F_INSN_BOUND_M_B_M; goto extract_sfmt_bound_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 157 :
+        if ((base_insn & 0xbf0) == 0x9d0)
+          { itype = CRISV10F_INSN_BOUND_M_W_M; goto extract_sfmt_bound_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 158 :
+        if ((base_insn & 0xbf0) == 0x9e0)
+          { itype = CRISV10F_INSN_BOUND_M_D_M; goto extract_sfmt_bound_m_d_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 160 :
+        if ((base_insn & 0xbf0) == 0xa00)
+          { itype = CRISV10F_INSN_ADD_M_B_M; goto extract_sfmt_add_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 161 :
+        if ((base_insn & 0xbf0) == 0xa10)
+          { itype = CRISV10F_INSN_ADD_M_W_M; goto extract_sfmt_add_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 162 :
+        if ((base_insn & 0xbf0) == 0xa20)
+          { itype = CRISV10F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 163 :
+        if ((base_insn & 0xbf0) == 0xa30)
+          { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 164 :
+        if ((base_insn & 0xbf0) == 0xa40)
+          { itype = CRISV10F_INSN_MOVE_M_B_M; goto extract_sfmt_move_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 165 :
+        if ((base_insn & 0xbf0) == 0xa50)
+          { itype = CRISV10F_INSN_MOVE_M_W_M; goto extract_sfmt_move_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 166 :
+        if ((base_insn & 0xbf0) == 0xa60)
+          { itype = CRISV10F_INSN_MOVE_M_D_M; goto extract_sfmt_move_m_d_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 167 : /* fall through */
-      case 231 : itype = CRISV10F_INSN_MOVE_SPR_MV10; goto extract_sfmt_move_spr_mv10;
-      case 168 : itype = CRISV10F_INSN_SUB_M_B_M; goto extract_sfmt_add_m_b_m;
-      case 169 : itype = CRISV10F_INSN_SUB_M_W_M; goto extract_sfmt_add_m_w_m;
-      case 170 : itype = CRISV10F_INSN_SUB_M_D_M; goto extract_sfmt_add_m_d_m;
-      case 172 : itype = CRISV10F_INSN_CMP_M_B_M; goto extract_sfmt_cmp_m_b_m;
-      case 173 : itype = CRISV10F_INSN_CMP_M_W_M; goto extract_sfmt_cmp_m_w_m;
-      case 174 : itype = CRISV10F_INSN_CMP_M_D_M; goto extract_sfmt_cmp_m_d_m;
-      case 176 : itype = CRISV10F_INSN_AND_M_B_M; goto extract_sfmt_and_m_b_m;
-      case 177 : itype = CRISV10F_INSN_AND_M_W_M; goto extract_sfmt_and_m_w_m;
-      case 178 : itype = CRISV10F_INSN_AND_M_D_M; goto extract_sfmt_and_m_d_m;
-      case 180 : itype = CRISV10F_INSN_OR_M_B_M; goto extract_sfmt_and_m_b_m;
-      case 181 : itype = CRISV10F_INSN_OR_M_W_M; goto extract_sfmt_and_m_w_m;
-      case 182 : itype = CRISV10F_INSN_OR_M_D_M; goto extract_sfmt_and_m_d_m;
+      case 231 :
+        if ((base_insn & 0xbf0) == 0xa70)
+          { itype = CRISV10F_INSN_MOVE_SPR_MV10; goto extract_sfmt_move_spr_mv10; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 168 :
+        if ((base_insn & 0xbf0) == 0xa80)
+          { itype = CRISV10F_INSN_SUB_M_B_M; goto extract_sfmt_add_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 169 :
+        if ((base_insn & 0xbf0) == 0xa90)
+          { itype = CRISV10F_INSN_SUB_M_W_M; goto extract_sfmt_add_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 170 :
+        if ((base_insn & 0xbf0) == 0xaa0)
+          { itype = CRISV10F_INSN_SUB_M_D_M; goto extract_sfmt_add_m_d_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 172 :
+        if ((base_insn & 0xbf0) == 0xac0)
+          { itype = CRISV10F_INSN_CMP_M_B_M; goto extract_sfmt_cmp_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 173 :
+        if ((base_insn & 0xbf0) == 0xad0)
+          { itype = CRISV10F_INSN_CMP_M_W_M; goto extract_sfmt_cmp_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 174 :
+        if ((base_insn & 0xbf0) == 0xae0)
+          { itype = CRISV10F_INSN_CMP_M_D_M; goto extract_sfmt_cmp_m_d_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 176 :
+        if ((base_insn & 0xbf0) == 0xb00)
+          { itype = CRISV10F_INSN_AND_M_B_M; goto extract_sfmt_and_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 177 :
+        if ((base_insn & 0xbf0) == 0xb10)
+          { itype = CRISV10F_INSN_AND_M_W_M; goto extract_sfmt_and_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 178 :
+        if ((base_insn & 0xbf0) == 0xb20)
+          { itype = CRISV10F_INSN_AND_M_D_M; goto extract_sfmt_and_m_d_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 180 :
+        if ((base_insn & 0xbf0) == 0xb40)
+          { itype = CRISV10F_INSN_OR_M_B_M; goto extract_sfmt_and_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 181 :
+        if ((base_insn & 0xbf0) == 0xb50)
+          { itype = CRISV10F_INSN_OR_M_W_M; goto extract_sfmt_and_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 182 :
+        if ((base_insn & 0xbf0) == 0xb60)
+          { itype = CRISV10F_INSN_OR_M_D_M; goto extract_sfmt_and_m_d_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 183 : /* fall through */
-      case 247 : itype = CRISV10F_INSN_SBFS; goto extract_sfmt_sbfs;
+      case 247 :
+        if ((base_insn & 0xfbf0) == 0x3b70)
+          { itype = CRISV10F_INSN_SBFS; goto extract_sfmt_sbfs; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 184 : /* fall through */
-      case 248 : itype = CRISV10F_INSN_TEST_M_B_M; goto extract_sfmt_test_m_b_m;
+      case 248 :
+        if ((base_insn & 0xfbf0) == 0xb80)
+          { itype = CRISV10F_INSN_TEST_M_B_M; goto extract_sfmt_test_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 185 : /* fall through */
-      case 249 : itype = CRISV10F_INSN_TEST_M_W_M; goto extract_sfmt_test_m_w_m;
+      case 249 :
+        if ((base_insn & 0xfbf0) == 0xb90)
+          { itype = CRISV10F_INSN_TEST_M_W_M; goto extract_sfmt_test_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 186 : /* fall through */
-      case 250 : itype = CRISV10F_INSN_TEST_M_D_M; goto extract_sfmt_test_m_d_m;
+      case 250 :
+        if ((base_insn & 0xfbf0) == 0xba0)
+          { itype = CRISV10F_INSN_TEST_M_D_M; goto extract_sfmt_test_m_d_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 187 : /* fall through */
       case 251 :
         {
@@ -1006,19 +1423,37 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_MOVEM_M_R; goto extract_sfmt_movem_m_r;
-          case 15 : itype = CRISV10F_INSN_MOVEM_M_PC; goto extract_sfmt_movem_m_pc;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xbb0)
+              { itype = CRISV10F_INSN_MOVEM_M_R; goto extract_sfmt_movem_m_r; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfbf0) == 0xfbb0)
+              { itype = CRISV10F_INSN_MOVEM_M_PC; goto extract_sfmt_movem_m_pc; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
       case 188 : /* fall through */
-      case 252 : itype = CRISV10F_INSN_MOVE_R_M_B_M; goto extract_sfmt_move_r_m_b_m;
+      case 252 :
+        if ((base_insn & 0xbf0) == 0xbc0)
+          { itype = CRISV10F_INSN_MOVE_R_M_B_M; goto extract_sfmt_move_r_m_b_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 189 : /* fall through */
-      case 253 : itype = CRISV10F_INSN_MOVE_R_M_W_M; goto extract_sfmt_move_r_m_w_m;
+      case 253 :
+        if ((base_insn & 0xbf0) == 0xbd0)
+          { itype = CRISV10F_INSN_MOVE_R_M_W_M; goto extract_sfmt_move_r_m_w_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 190 : /* fall through */
-      case 254 : itype = CRISV10F_INSN_MOVE_R_M_D_M; goto extract_sfmt_move_r_m_d_m;
+      case 254 :
+        if ((base_insn & 0xbf0) == 0xbe0)
+          { itype = CRISV10F_INSN_MOVE_R_M_D_M; goto extract_sfmt_move_r_m_d_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 191 : /* fall through */
-      case 255 : itype = CRISV10F_INSN_MOVEM_R_M; goto extract_sfmt_movem_r_m;
+      case 255 :
+        if ((base_insn & 0xbf0) == 0xbf0)
+          { itype = CRISV10F_INSN_MOVEM_R_M; goto extract_sfmt_movem_r_m; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 192 :
         {
           unsigned int val = (((insn >> 0) & (15 << 0)));
@@ -1038,8 +1473,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADDU_M_B_M; goto extract_sfmt_adds_m_b_m;
-          case 15 : itype = CRISV10F_INSN_ADDUCBR; goto extract_sfmt_addscbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x800)
+              { itype = CRISV10F_INSN_ADDU_M_B_M; goto extract_sfmt_adds_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc0f)
+              { itype = CRISV10F_INSN_ADDUCBR; goto extract_sfmt_addscbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1062,8 +1503,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADDU_M_W_M; goto extract_sfmt_adds_m_w_m;
-          case 15 : itype = CRISV10F_INSN_ADDUCWR; goto extract_sfmt_addscwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x810)
+              { itype = CRISV10F_INSN_ADDU_M_W_M; goto extract_sfmt_adds_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc1f)
+              { itype = CRISV10F_INSN_ADDUCWR; goto extract_sfmt_addscwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1086,8 +1533,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADDS_M_B_M; goto extract_sfmt_adds_m_b_m;
-          case 15 : itype = CRISV10F_INSN_ADDSCBR; goto extract_sfmt_addscbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x820)
+              { itype = CRISV10F_INSN_ADDS_M_B_M; goto extract_sfmt_adds_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc2f)
+              { itype = CRISV10F_INSN_ADDSCBR; goto extract_sfmt_addscbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1110,8 +1563,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m;
-          case 15 : itype = CRISV10F_INSN_ADDSCWR; goto extract_sfmt_addscwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x830)
+              { itype = CRISV10F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc3f)
+              { itype = CRISV10F_INSN_ADDSCWR; goto extract_sfmt_addscwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1134,8 +1593,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_MOVU_M_B_M; goto extract_sfmt_movs_m_b_m;
-          case 15 : itype = CRISV10F_INSN_MOVUCBR; goto extract_sfmt_movucbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x840)
+              { itype = CRISV10F_INSN_MOVU_M_B_M; goto extract_sfmt_movs_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc4f)
+              { itype = CRISV10F_INSN_MOVUCBR; goto extract_sfmt_movucbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1158,8 +1623,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_MOVU_M_W_M; goto extract_sfmt_movs_m_w_m;
-          case 15 : itype = CRISV10F_INSN_MOVUCWR; goto extract_sfmt_movucwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x850)
+              { itype = CRISV10F_INSN_MOVU_M_W_M; goto extract_sfmt_movs_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc5f)
+              { itype = CRISV10F_INSN_MOVUCWR; goto extract_sfmt_movucwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1182,8 +1653,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_MOVS_M_B_M; goto extract_sfmt_movs_m_b_m;
-          case 15 : itype = CRISV10F_INSN_MOVSCBR; goto extract_sfmt_movscbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x860)
+              { itype = CRISV10F_INSN_MOVS_M_B_M; goto extract_sfmt_movs_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc6f)
+              { itype = CRISV10F_INSN_MOVSCBR; goto extract_sfmt_movscbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1206,8 +1683,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_MOVS_M_W_M; goto extract_sfmt_movs_m_w_m;
-          case 15 : itype = CRISV10F_INSN_MOVSCWR; goto extract_sfmt_movscwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x870)
+              { itype = CRISV10F_INSN_MOVS_M_W_M; goto extract_sfmt_movs_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc7f)
+              { itype = CRISV10F_INSN_MOVSCWR; goto extract_sfmt_movscwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1230,8 +1713,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_SUBU_M_B_M; goto extract_sfmt_adds_m_b_m;
-          case 15 : itype = CRISV10F_INSN_SUBUCBR; goto extract_sfmt_addscbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x880)
+              { itype = CRISV10F_INSN_SUBU_M_B_M; goto extract_sfmt_adds_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc8f)
+              { itype = CRISV10F_INSN_SUBUCBR; goto extract_sfmt_addscbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1254,8 +1743,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_SUBU_M_W_M; goto extract_sfmt_adds_m_w_m;
-          case 15 : itype = CRISV10F_INSN_SUBUCWR; goto extract_sfmt_addscwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x890)
+              { itype = CRISV10F_INSN_SUBU_M_W_M; goto extract_sfmt_adds_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc9f)
+              { itype = CRISV10F_INSN_SUBUCWR; goto extract_sfmt_addscwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1278,8 +1773,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_SUBS_M_B_M; goto extract_sfmt_adds_m_b_m;
-          case 15 : itype = CRISV10F_INSN_SUBSCBR; goto extract_sfmt_addscbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x8a0)
+              { itype = CRISV10F_INSN_SUBS_M_B_M; goto extract_sfmt_adds_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xcaf)
+              { itype = CRISV10F_INSN_SUBSCBR; goto extract_sfmt_addscbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1302,8 +1803,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_SUBS_M_W_M; goto extract_sfmt_adds_m_w_m;
-          case 15 : itype = CRISV10F_INSN_SUBSCWR; goto extract_sfmt_addscwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x8b0)
+              { itype = CRISV10F_INSN_SUBS_M_W_M; goto extract_sfmt_adds_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xcbf)
+              { itype = CRISV10F_INSN_SUBSCWR; goto extract_sfmt_addscwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1326,8 +1833,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_CMPU_M_B_M; goto extract_sfmt_cmp_m_b_m;
-          case 15 : itype = CRISV10F_INSN_CMPUCBR; goto extract_sfmt_cmpucbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x8c0)
+              { itype = CRISV10F_INSN_CMPU_M_B_M; goto extract_sfmt_cmp_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xccf)
+              { itype = CRISV10F_INSN_CMPUCBR; goto extract_sfmt_cmpucbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1350,8 +1863,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_CMPU_M_W_M; goto extract_sfmt_cmp_m_w_m;
-          case 15 : itype = CRISV10F_INSN_CMPUCWR; goto extract_sfmt_cmpucwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x8d0)
+              { itype = CRISV10F_INSN_CMPU_M_W_M; goto extract_sfmt_cmp_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xcdf)
+              { itype = CRISV10F_INSN_CMPUCWR; goto extract_sfmt_cmpucwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1374,8 +1893,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_CMPS_M_B_M; goto extract_sfmt_cmp_m_b_m;
-          case 15 : itype = CRISV10F_INSN_CMPSCBR; goto extract_sfmt_cmpcbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x8e0)
+              { itype = CRISV10F_INSN_CMPS_M_B_M; goto extract_sfmt_cmp_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xcef)
+              { itype = CRISV10F_INSN_CMPSCBR; goto extract_sfmt_cmpcbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1398,14 +1923,29 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_CMPS_M_W_M; goto extract_sfmt_cmp_m_w_m;
-          case 15 : itype = CRISV10F_INSN_CMPSCWR; goto extract_sfmt_cmpcwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x8f0)
+              { itype = CRISV10F_INSN_CMPS_M_W_M; goto extract_sfmt_cmp_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xcff)
+              { itype = CRISV10F_INSN_CMPSCWR; goto extract_sfmt_cmpcwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 208 : itype = CRISV10F_INSN_MULS_B; goto extract_sfmt_muls_b;
-      case 209 : itype = CRISV10F_INSN_MULS_W; goto extract_sfmt_muls_b;
-      case 210 : itype = CRISV10F_INSN_MULS_D; goto extract_sfmt_muls_b;
+      case 208 :
+        if ((base_insn & 0xff0) == 0xd00)
+          { itype = CRISV10F_INSN_MULS_B; goto extract_sfmt_muls_b; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 209 :
+        if ((base_insn & 0xff0) == 0xd10)
+          { itype = CRISV10F_INSN_MULS_W; goto extract_sfmt_muls_b; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 210 :
+        if ((base_insn & 0xff0) == 0xd20)
+          { itype = CRISV10F_INSN_MULS_D; goto extract_sfmt_muls_b; }
+        itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 211 :
         {
           unsigned int val = (((insn >> 0) & (15 << 0)));
@@ -1425,8 +1965,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_JUMP_M; goto extract_sfmt_jump_m;
-          case 15 : itype = CRISV10F_INSN_JUMP_C; goto extract_sfmt_jump_c;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x930)
+              { itype = CRISV10F_INSN_JUMP_M; goto extract_sfmt_jump_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xd3f)
+              { itype = CRISV10F_INSN_JUMP_C; goto extract_sfmt_jump_c; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1449,8 +1995,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADDO_M_B_M; goto extract_sfmt_addo_m_b_m;
-          case 15 : itype = CRISV10F_INSN_ADDO_CB; goto extract_sfmt_addo_cb;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x940)
+              { itype = CRISV10F_INSN_ADDO_M_B_M; goto extract_sfmt_addo_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xd4f)
+              { itype = CRISV10F_INSN_ADDO_CB; goto extract_sfmt_addo_cb; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1473,8 +2025,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADDO_M_W_M; goto extract_sfmt_addo_m_w_m;
-          case 15 : itype = CRISV10F_INSN_ADDO_CW; goto extract_sfmt_addo_cw;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x950)
+              { itype = CRISV10F_INSN_ADDO_M_W_M; goto extract_sfmt_addo_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xd5f)
+              { itype = CRISV10F_INSN_ADDO_CW; goto extract_sfmt_addo_cw; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1497,8 +2055,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADDO_M_D_M; goto extract_sfmt_addo_m_d_m;
-          case 15 : itype = CRISV10F_INSN_ADDO_CD; goto extract_sfmt_addo_cd;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x960)
+              { itype = CRISV10F_INSN_ADDO_M_D_M; goto extract_sfmt_addo_m_d_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xd6f)
+              { itype = CRISV10F_INSN_ADDO_CD; goto extract_sfmt_addo_cd; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1521,8 +2085,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_DIP_M; goto extract_sfmt_dip_m;
-          case 15 : itype = CRISV10F_INSN_DIP_C; goto extract_sfmt_dip_c;
+          case 14 :
+            if ((base_insn & 0xfbf0) == 0x970)
+              { itype = CRISV10F_INSN_DIP_M; goto extract_sfmt_dip_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xffff) == 0xd7f)
+              { itype = CRISV10F_INSN_DIP_C; goto extract_sfmt_dip_c; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1545,8 +2115,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_BOUND_M_B_M; goto extract_sfmt_bound_m_b_m;
-          case 15 : itype = CRISV10F_INSN_BOUND_CB; goto extract_sfmt_bound_cb;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x9c0)
+              { itype = CRISV10F_INSN_BOUND_M_B_M; goto extract_sfmt_bound_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xdcf)
+              { itype = CRISV10F_INSN_BOUND_CB; goto extract_sfmt_bound_cb; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1569,8 +2145,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_BOUND_M_W_M; goto extract_sfmt_bound_m_w_m;
-          case 15 : itype = CRISV10F_INSN_BOUND_CW; goto extract_sfmt_bound_cw;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x9d0)
+              { itype = CRISV10F_INSN_BOUND_M_W_M; goto extract_sfmt_bound_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xddf)
+              { itype = CRISV10F_INSN_BOUND_CW; goto extract_sfmt_bound_cw; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1593,8 +2175,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_BOUND_M_D_M; goto extract_sfmt_bound_m_d_m;
-          case 15 : itype = CRISV10F_INSN_BOUND_CD; goto extract_sfmt_bound_cd;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x9e0)
+              { itype = CRISV10F_INSN_BOUND_M_D_M; goto extract_sfmt_bound_m_d_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xdef)
+              { itype = CRISV10F_INSN_BOUND_CD; goto extract_sfmt_bound_cd; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1617,8 +2205,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 15 : itype = CRISV10F_INSN_BCC_W; goto extract_sfmt_bcc_w;
-          case 14 : itype = CRISV10F_INSN_BA_W; goto extract_sfmt_ba_w;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xdff)
+              { itype = CRISV10F_INSN_BCC_W; goto extract_sfmt_bcc_w; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 14 :
+            if ((base_insn & 0xffff) == 0xedff)
+              { itype = CRISV10F_INSN_BA_W; goto extract_sfmt_ba_w; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1641,8 +2235,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADD_M_B_M; goto extract_sfmt_add_m_b_m;
-          case 15 : itype = CRISV10F_INSN_ADDCBR; goto extract_sfmt_addcbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa00)
+              { itype = CRISV10F_INSN_ADD_M_B_M; goto extract_sfmt_add_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe0f)
+              { itype = CRISV10F_INSN_ADDCBR; goto extract_sfmt_addcbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1665,8 +2265,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_ADD_M_W_M; goto extract_sfmt_add_m_w_m;
-          case 15 : itype = CRISV10F_INSN_ADDCWR; goto extract_sfmt_addcwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa10)
+              { itype = CRISV10F_INSN_ADD_M_W_M; goto extract_sfmt_add_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe1f)
+              { itype = CRISV10F_INSN_ADDCWR; goto extract_sfmt_addcwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1708,8 +2314,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m;
-              case 15 : itype = CRISV10F_INSN_ADDCDR; goto extract_sfmt_addcdr;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa20)
+                  { itype = CRISV10F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xfff) == 0xe2f)
+                  { itype = CRISV10F_INSN_ADDCDR; goto extract_sfmt_addcdr; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1732,8 +2344,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m;
-              case 15 : itype = CRISV10F_INSN_ADDCPC; goto extract_sfmt_addcpc;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa20)
+                  { itype = CRISV10F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xfe2f)
+                  { itype = CRISV10F_INSN_ADDCPC; goto extract_sfmt_addcpc; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1764,8 +2382,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P0; goto extract_sfmt_move_c_sprv10_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xe3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P0; goto extract_sfmt_move_c_sprv10_p0; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1788,14 +2412,23 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P1; goto extract_sfmt_move_c_sprv10_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x1e3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P1; goto extract_sfmt_move_c_sprv10_p0; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
           case 2 : /* fall through */
           case 3 : /* fall through */
-          case 6 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
+          case 6 :
+            if ((base_insn & 0xbf0) == 0xa30)
+              { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           case 4 :
             {
               unsigned int val = (((insn >> 0) & (15 << 0)));
@@ -1815,8 +2448,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P4; goto extract_sfmt_move_c_sprv10_p4;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x4e3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P4; goto extract_sfmt_move_c_sprv10_p4; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1839,8 +2478,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P5; goto extract_sfmt_move_c_sprv10_p4;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x5e3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P5; goto extract_sfmt_move_c_sprv10_p4; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1863,8 +2508,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P7; goto extract_sfmt_move_c_sprv10_p8;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x7e3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P7; goto extract_sfmt_move_c_sprv10_p8; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1887,8 +2538,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P8; goto extract_sfmt_move_c_sprv10_p8;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x8e3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P8; goto extract_sfmt_move_c_sprv10_p8; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1911,8 +2568,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P9; goto extract_sfmt_move_c_sprv10_p8;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x9e3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P9; goto extract_sfmt_move_c_sprv10_p8; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1935,8 +2598,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P10; goto extract_sfmt_move_c_sprv10_p8;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xae3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P10; goto extract_sfmt_move_c_sprv10_p8; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1959,8 +2628,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P11; goto extract_sfmt_move_c_sprv10_p8;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xbe3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P11; goto extract_sfmt_move_c_sprv10_p8; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1983,8 +2658,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P12; goto extract_sfmt_move_c_sprv10_p8;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xce3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P12; goto extract_sfmt_move_c_sprv10_p8; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -2007,8 +2688,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P13; goto extract_sfmt_move_c_sprv10_p8;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xde3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P13; goto extract_sfmt_move_c_sprv10_p8; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -2031,8 +2718,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P14; goto extract_sfmt_move_c_sprv10_p8;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xee3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P14; goto extract_sfmt_move_c_sprv10_p8; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -2055,8 +2748,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10;
-              case 15 : itype = CRISV10F_INSN_MOVE_C_SPRV10_P15; goto extract_sfmt_move_c_sprv10_p8;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV10F_INSN_MOVE_M_SPRV10; goto extract_sfmt_move_m_sprv10; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xfe3f)
+                  { itype = CRISV10F_INSN_MOVE_C_SPRV10_P15; goto extract_sfmt_move_c_sprv10_p8; }
+                itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -2082,8 +2781,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_MOVE_M_B_M; goto extract_sfmt_move_m_b_m;
-          case 15 : itype = CRISV10F_INSN_MOVECBR; goto extract_sfmt_movecbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa40)
+              { itype = CRISV10F_INSN_MOVE_M_B_M; goto extract_sfmt_move_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe4f)
+              { itype = CRISV10F_INSN_MOVECBR; goto extract_sfmt_movecbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2106,8 +2811,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_MOVE_M_W_M; goto extract_sfmt_move_m_w_m;
-          case 15 : itype = CRISV10F_INSN_MOVECWR; goto extract_sfmt_movecwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa50)
+              { itype = CRISV10F_INSN_MOVE_M_W_M; goto extract_sfmt_move_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe5f)
+              { itype = CRISV10F_INSN_MOVECWR; goto extract_sfmt_movecwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2130,8 +2841,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_MOVE_M_D_M; goto extract_sfmt_move_m_d_m;
-          case 15 : itype = CRISV10F_INSN_MOVECDR; goto extract_sfmt_movecdr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa60)
+              { itype = CRISV10F_INSN_MOVE_M_D_M; goto extract_sfmt_move_m_d_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe6f)
+              { itype = CRISV10F_INSN_MOVECDR; goto extract_sfmt_movecdr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2154,8 +2871,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_SUB_M_B_M; goto extract_sfmt_add_m_b_m;
-          case 15 : itype = CRISV10F_INSN_SUBCBR; goto extract_sfmt_addcbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa80)
+              { itype = CRISV10F_INSN_SUB_M_B_M; goto extract_sfmt_add_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe8f)
+              { itype = CRISV10F_INSN_SUBCBR; goto extract_sfmt_addcbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2178,8 +2901,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_SUB_M_W_M; goto extract_sfmt_add_m_w_m;
-          case 15 : itype = CRISV10F_INSN_SUBCWR; goto extract_sfmt_addcwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa90)
+              { itype = CRISV10F_INSN_SUB_M_W_M; goto extract_sfmt_add_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe9f)
+              { itype = CRISV10F_INSN_SUBCWR; goto extract_sfmt_addcwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2202,8 +2931,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_SUB_M_D_M; goto extract_sfmt_add_m_d_m;
-          case 15 : itype = CRISV10F_INSN_SUBCDR; goto extract_sfmt_addcdr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xaa0)
+              { itype = CRISV10F_INSN_SUB_M_D_M; goto extract_sfmt_add_m_d_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xeaf)
+              { itype = CRISV10F_INSN_SUBCDR; goto extract_sfmt_addcdr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2226,8 +2961,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_CMP_M_B_M; goto extract_sfmt_cmp_m_b_m;
-          case 15 : itype = CRISV10F_INSN_CMPCBR; goto extract_sfmt_cmpcbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xac0)
+              { itype = CRISV10F_INSN_CMP_M_B_M; goto extract_sfmt_cmp_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xecf)
+              { itype = CRISV10F_INSN_CMPCBR; goto extract_sfmt_cmpcbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2250,8 +2991,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_CMP_M_W_M; goto extract_sfmt_cmp_m_w_m;
-          case 15 : itype = CRISV10F_INSN_CMPCWR; goto extract_sfmt_cmpcwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xad0)
+              { itype = CRISV10F_INSN_CMP_M_W_M; goto extract_sfmt_cmp_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xedf)
+              { itype = CRISV10F_INSN_CMPCWR; goto extract_sfmt_cmpcwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2274,8 +3021,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_CMP_M_D_M; goto extract_sfmt_cmp_m_d_m;
-          case 15 : itype = CRISV10F_INSN_CMPCDR; goto extract_sfmt_cmpcdr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xae0)
+              { itype = CRISV10F_INSN_CMP_M_D_M; goto extract_sfmt_cmp_m_d_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xeef)
+              { itype = CRISV10F_INSN_CMPCDR; goto extract_sfmt_cmpcdr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2298,8 +3051,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_AND_M_B_M; goto extract_sfmt_and_m_b_m;
-          case 15 : itype = CRISV10F_INSN_ANDCBR; goto extract_sfmt_andcbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xb00)
+              { itype = CRISV10F_INSN_AND_M_B_M; goto extract_sfmt_and_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xf0f)
+              { itype = CRISV10F_INSN_ANDCBR; goto extract_sfmt_andcbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2322,8 +3081,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_AND_M_W_M; goto extract_sfmt_and_m_w_m;
-          case 15 : itype = CRISV10F_INSN_ANDCWR; goto extract_sfmt_andcwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xb10)
+              { itype = CRISV10F_INSN_AND_M_W_M; goto extract_sfmt_and_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xf1f)
+              { itype = CRISV10F_INSN_ANDCWR; goto extract_sfmt_andcwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2346,8 +3111,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_AND_M_D_M; goto extract_sfmt_and_m_d_m;
-          case 15 : itype = CRISV10F_INSN_ANDCDR; goto extract_sfmt_andcdr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xb20)
+              { itype = CRISV10F_INSN_AND_M_D_M; goto extract_sfmt_and_m_d_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xf2f)
+              { itype = CRISV10F_INSN_ANDCDR; goto extract_sfmt_andcdr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2370,8 +3141,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_OR_M_B_M; goto extract_sfmt_and_m_b_m;
-          case 15 : itype = CRISV10F_INSN_ORCBR; goto extract_sfmt_andcbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xb40)
+              { itype = CRISV10F_INSN_OR_M_B_M; goto extract_sfmt_and_m_b_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xf4f)
+              { itype = CRISV10F_INSN_ORCBR; goto extract_sfmt_andcbr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2394,8 +3171,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_OR_M_W_M; goto extract_sfmt_and_m_w_m;
-          case 15 : itype = CRISV10F_INSN_ORCWR; goto extract_sfmt_andcwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xb50)
+              { itype = CRISV10F_INSN_OR_M_W_M; goto extract_sfmt_and_m_w_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xf5f)
+              { itype = CRISV10F_INSN_ORCWR; goto extract_sfmt_andcwr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2418,8 +3201,14 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV10F_INSN_OR_M_D_M; goto extract_sfmt_and_m_d_m;
-          case 15 : itype = CRISV10F_INSN_ORCDR; goto extract_sfmt_andcdr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xb60)
+              { itype = CRISV10F_INSN_OR_M_D_M; goto extract_sfmt_and_m_d_m; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xf6f)
+              { itype = CRISV10F_INSN_ORCDR; goto extract_sfmt_andcdr; }
+            itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV10F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -2601,8 +3390,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -2631,8 +3420,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -2691,9 +3480,9 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_indir_pc__byte) = f_indir_pc__byte;
@@ -2721,9 +3510,9 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_indir_pc__word) = f_indir_pc__word;
@@ -2751,9 +3540,9 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_indir_pc__byte) = f_indir_pc__byte;
@@ -2781,9 +3570,9 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_indir_pc__word) = f_indir_pc__word;
@@ -2963,8 +3752,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -2993,8 +3782,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -3080,8 +3869,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -3110,8 +3899,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -3412,9 +4201,9 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_indir_pc__byte) = f_indir_pc__byte;
@@ -3442,9 +4231,9 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_indir_pc__word) = f_indir_pc__word;
@@ -3842,8 +4631,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -3873,8 +4662,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -4027,8 +4816,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -4058,8 +4847,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -4647,8 +5436,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -4678,8 +5467,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -5056,8 +5845,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_NON_V32 ()) ? (0) : (4))))));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_NON_V32 ()) ? (0) : (4))))));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -5084,8 +5873,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_NON_V32 ()) ? (0) : (4))))));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_NON_V32 ()) ? (0) : (4))))));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_o_word_pcrel) = f_indir_pc__word_pcrel;
@@ -5323,8 +6112,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -5354,8 +6143,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -5589,8 +6378,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -5619,8 +6408,8 @@ crisv10f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
diff --git a/sim/cris/decodev10.h b/sim/cris/decodev10.h
index b6a14cf..f5aa822 100644
--- a/sim/cris/decodev10.h
+++ b/sim/cris/decodev10.h
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/decodev32.c b/sim/cris/decodev32.c
index f469e14..aa9d353 100644
--- a/sim/cris/decodev32.c
+++ b/sim/cris/decodev32.c
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -371,8 +371,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 15 : itype = CRISV32F_INSN_BCC_B; goto extract_sfmt_bcc_b;
-          case 14 : itype = CRISV32F_INSN_BA_B; goto extract_sfmt_ba_b;
+          case 15 :
+            if ((base_insn & 0xf00) == 0x0)
+              { itype = CRISV32F_INSN_BCC_B; goto extract_sfmt_bcc_b; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 14 :
+            if ((base_insn & 0xff00) == 0xe000)
+              { itype = CRISV32F_INSN_BA_B; goto extract_sfmt_ba_b; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -391,192 +397,609 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
       case 28 : /* fall through */
       case 29 : /* fall through */
       case 30 : /* fall through */
-      case 31 : itype = CRISV32F_INSN_ADDOQ; goto extract_sfmt_addoq;
+      case 31 :
+        if ((base_insn & 0xf00) == 0x100)
+          { itype = CRISV32F_INSN_ADDOQ; goto extract_sfmt_addoq; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 32 : /* fall through */
       case 33 : /* fall through */
       case 34 : /* fall through */
-      case 35 : itype = CRISV32F_INSN_ADDQ; goto extract_sfmt_addq;
+      case 35 :
+        if ((base_insn & 0xfc0) == 0x200)
+          { itype = CRISV32F_INSN_ADDQ; goto extract_sfmt_addq; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 36 : /* fall through */
       case 37 : /* fall through */
       case 38 : /* fall through */
-      case 39 : itype = CRISV32F_INSN_MOVEQ; goto extract_sfmt_moveq;
+      case 39 :
+        if ((base_insn & 0xfc0) == 0x240)
+          { itype = CRISV32F_INSN_MOVEQ; goto extract_sfmt_moveq; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 40 : /* fall through */
       case 41 : /* fall through */
       case 42 : /* fall through */
-      case 43 : itype = CRISV32F_INSN_SUBQ; goto extract_sfmt_addq;
+      case 43 :
+        if ((base_insn & 0xfc0) == 0x280)
+          { itype = CRISV32F_INSN_SUBQ; goto extract_sfmt_addq; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 44 : /* fall through */
       case 45 : /* fall through */
       case 46 : /* fall through */
-      case 47 : itype = CRISV32F_INSN_CMPQ; goto extract_sfmt_cmpq;
+      case 47 :
+        if ((base_insn & 0xfc0) == 0x2c0)
+          { itype = CRISV32F_INSN_CMPQ; goto extract_sfmt_cmpq; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 48 : /* fall through */
       case 49 : /* fall through */
       case 50 : /* fall through */
-      case 51 : itype = CRISV32F_INSN_ANDQ; goto extract_sfmt_andq;
+      case 51 :
+        if ((base_insn & 0xfc0) == 0x300)
+          { itype = CRISV32F_INSN_ANDQ; goto extract_sfmt_andq; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 52 : /* fall through */
       case 53 : /* fall through */
       case 54 : /* fall through */
-      case 55 : itype = CRISV32F_INSN_ORQ; goto extract_sfmt_andq;
+      case 55 :
+        if ((base_insn & 0xfc0) == 0x340)
+          { itype = CRISV32F_INSN_ORQ; goto extract_sfmt_andq; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 56 : /* fall through */
-      case 57 : itype = CRISV32F_INSN_BTSTQ; goto extract_sfmt_btstq;
+      case 57 :
+        if ((base_insn & 0xfe0) == 0x380)
+          { itype = CRISV32F_INSN_BTSTQ; goto extract_sfmt_btstq; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 58 : /* fall through */
-      case 59 : itype = CRISV32F_INSN_ASRQ; goto extract_sfmt_asrq;
+      case 59 :
+        if ((base_insn & 0xfe0) == 0x3a0)
+          { itype = CRISV32F_INSN_ASRQ; goto extract_sfmt_asrq; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 60 : /* fall through */
-      case 61 : itype = CRISV32F_INSN_LSLQ; goto extract_sfmt_asrq;
+      case 61 :
+        if ((base_insn & 0xfe0) == 0x3c0)
+          { itype = CRISV32F_INSN_LSLQ; goto extract_sfmt_asrq; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 62 : /* fall through */
-      case 63 : itype = CRISV32F_INSN_LSRQ; goto extract_sfmt_asrq;
-      case 64 : itype = CRISV32F_INSN_ADDU_B_R; goto extract_sfmt_add_d_r;
-      case 65 : itype = CRISV32F_INSN_ADDU_W_R; goto extract_sfmt_add_d_r;
-      case 66 : itype = CRISV32F_INSN_ADDS_B_R; goto extract_sfmt_add_d_r;
-      case 67 : itype = CRISV32F_INSN_ADDS_W_R; goto extract_sfmt_add_d_r;
-      case 68 : itype = CRISV32F_INSN_MOVU_B_R; goto extract_sfmt_movs_b_r;
-      case 69 : itype = CRISV32F_INSN_MOVU_W_R; goto extract_sfmt_movs_b_r;
-      case 70 : itype = CRISV32F_INSN_MOVS_B_R; goto extract_sfmt_movs_b_r;
-      case 71 : itype = CRISV32F_INSN_MOVS_W_R; goto extract_sfmt_movs_b_r;
-      case 72 : itype = CRISV32F_INSN_SUBU_B_R; goto extract_sfmt_add_d_r;
-      case 73 : itype = CRISV32F_INSN_SUBU_W_R; goto extract_sfmt_add_d_r;
-      case 74 : itype = CRISV32F_INSN_SUBS_B_R; goto extract_sfmt_add_d_r;
-      case 75 : itype = CRISV32F_INSN_SUBS_W_R; goto extract_sfmt_add_d_r;
-      case 76 : itype = CRISV32F_INSN_LSLR_B_R; goto extract_sfmt_lsrr_b_r;
-      case 77 : itype = CRISV32F_INSN_LSLR_W_R; goto extract_sfmt_lsrr_b_r;
-      case 78 : itype = CRISV32F_INSN_LSLR_D_R; goto extract_sfmt_lsrr_d_r;
-      case 79 : itype = CRISV32F_INSN_BTST; goto extract_sfmt_btst;
-      case 80 : itype = CRISV32F_INSN_ADDI_B_R; goto extract_sfmt_addi_b_r;
-      case 81 : itype = CRISV32F_INSN_ADDI_W_R; goto extract_sfmt_addi_b_r;
-      case 82 : itype = CRISV32F_INSN_ADDI_D_R; goto extract_sfmt_addi_b_r;
-      case 83 : itype = CRISV32F_INSN_SCC; goto extract_sfmt_scc;
-      case 84 : itype = CRISV32F_INSN_ADDI_ACR_B_R; goto extract_sfmt_addi_acr_b_r;
-      case 85 : itype = CRISV32F_INSN_ADDI_ACR_W_R; goto extract_sfmt_addi_acr_b_r;
-      case 86 : itype = CRISV32F_INSN_ADDI_ACR_D_R; goto extract_sfmt_addi_acr_b_r;
-      case 87 : itype = CRISV32F_INSN_ADDC_R; goto extract_sfmt_add_d_r;
-      case 88 : itype = CRISV32F_INSN_NEG_B_R; goto extract_sfmt_neg_b_r;
-      case 89 : itype = CRISV32F_INSN_NEG_W_R; goto extract_sfmt_neg_b_r;
-      case 90 : itype = CRISV32F_INSN_NEG_D_R; goto extract_sfmt_neg_d_r;
-      case 91 : itype = CRISV32F_INSN_SETF; goto extract_sfmt_setf;
-      case 92 : itype = CRISV32F_INSN_BOUND_R_B_R; goto extract_sfmt_dstep;
-      case 93 : itype = CRISV32F_INSN_BOUND_R_W_R; goto extract_sfmt_dstep;
-      case 94 : itype = CRISV32F_INSN_BOUND_R_D_R; goto extract_sfmt_dstep;
-      case 95 : itype = CRISV32F_INSN_CLEARF; goto extract_sfmt_setf;
-      case 96 : itype = CRISV32F_INSN_ADD_B_R; goto extract_sfmt_add_b_r;
-      case 97 : itype = CRISV32F_INSN_ADD_W_R; goto extract_sfmt_add_b_r;
-      case 98 : itype = CRISV32F_INSN_ADD_D_R; goto extract_sfmt_add_d_r;
-      case 99 : itype = CRISV32F_INSN_MOVE_R_SPRV32; goto extract_sfmt_move_r_sprv32;
-      case 100 : itype = CRISV32F_INSN_MOVE_B_R; goto extract_sfmt_move_b_r;
-      case 101 : itype = CRISV32F_INSN_MOVE_W_R; goto extract_sfmt_move_b_r;
-      case 102 : itype = CRISV32F_INSN_MOVE_D_R; goto extract_sfmt_move_d_r;
-      case 103 : itype = CRISV32F_INSN_MOVE_SPR_RV32; goto extract_sfmt_move_spr_rv32;
-      case 104 : itype = CRISV32F_INSN_SUB_B_R; goto extract_sfmt_add_b_r;
-      case 105 : itype = CRISV32F_INSN_SUB_W_R; goto extract_sfmt_add_b_r;
-      case 106 : itype = CRISV32F_INSN_SUB_D_R; goto extract_sfmt_add_d_r;
-      case 107 : itype = CRISV32F_INSN_ABS; goto extract_sfmt_movs_b_r;
-      case 108 : itype = CRISV32F_INSN_CMP_R_B_R; goto extract_sfmt_cmp_r_b_r;
-      case 109 : itype = CRISV32F_INSN_CMP_R_W_R; goto extract_sfmt_cmp_r_b_r;
-      case 110 : itype = CRISV32F_INSN_CMP_R_D_R; goto extract_sfmt_cmp_r_b_r;
-      case 111 : itype = CRISV32F_INSN_DSTEP; goto extract_sfmt_dstep;
-      case 112 : itype = CRISV32F_INSN_AND_B_R; goto extract_sfmt_and_b_r;
-      case 113 : itype = CRISV32F_INSN_AND_W_R; goto extract_sfmt_and_w_r;
-      case 114 : itype = CRISV32F_INSN_AND_D_R; goto extract_sfmt_and_d_r;
-      case 115 : itype = CRISV32F_INSN_LZ; goto extract_sfmt_movs_b_r;
-      case 116 : itype = CRISV32F_INSN_ORR_B_R; goto extract_sfmt_and_b_r;
-      case 117 : itype = CRISV32F_INSN_ORR_W_R; goto extract_sfmt_and_w_r;
-      case 118 : itype = CRISV32F_INSN_ORR_D_R; goto extract_sfmt_and_d_r;
-      case 119 : itype = CRISV32F_INSN_SWAP; goto extract_sfmt_swap;
-      case 120 : itype = CRISV32F_INSN_ASRR_B_R; goto extract_sfmt_asrr_b_r;
-      case 121 : itype = CRISV32F_INSN_ASRR_W_R; goto extract_sfmt_asrr_b_r;
-      case 122 : itype = CRISV32F_INSN_ASRR_D_R; goto extract_sfmt_and_d_r;
-      case 123 : itype = CRISV32F_INSN_XOR; goto extract_sfmt_dstep;
-      case 124 : itype = CRISV32F_INSN_LSRR_B_R; goto extract_sfmt_lsrr_b_r;
-      case 125 : itype = CRISV32F_INSN_LSRR_W_R; goto extract_sfmt_lsrr_b_r;
-      case 126 : itype = CRISV32F_INSN_LSRR_D_R; goto extract_sfmt_lsrr_d_r;
-      case 127 : itype = CRISV32F_INSN_MCP; goto extract_sfmt_mcp;
-      case 128 : itype = CRISV32F_INSN_ADDU_M_B_M; goto extract_sfmt_adds_m_b_m;
-      case 129 : itype = CRISV32F_INSN_ADDU_M_W_M; goto extract_sfmt_adds_m_w_m;
-      case 130 : itype = CRISV32F_INSN_ADDS_M_B_M; goto extract_sfmt_adds_m_b_m;
-      case 131 : itype = CRISV32F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m;
-      case 132 : itype = CRISV32F_INSN_MOVU_M_B_M; goto extract_sfmt_movs_m_b_m;
-      case 133 : itype = CRISV32F_INSN_MOVU_M_W_M; goto extract_sfmt_movs_m_w_m;
-      case 134 : itype = CRISV32F_INSN_MOVS_M_B_M; goto extract_sfmt_movs_m_b_m;
-      case 135 : itype = CRISV32F_INSN_MOVS_M_W_M; goto extract_sfmt_movs_m_w_m;
-      case 136 : itype = CRISV32F_INSN_SUBU_M_B_M; goto extract_sfmt_adds_m_b_m;
-      case 137 : itype = CRISV32F_INSN_SUBU_M_W_M; goto extract_sfmt_adds_m_w_m;
-      case 138 : itype = CRISV32F_INSN_SUBS_M_B_M; goto extract_sfmt_adds_m_b_m;
-      case 139 : itype = CRISV32F_INSN_SUBS_M_W_M; goto extract_sfmt_adds_m_w_m;
-      case 140 : itype = CRISV32F_INSN_CMPU_M_B_M; goto extract_sfmt_cmp_m_b_m;
-      case 141 : itype = CRISV32F_INSN_CMPU_M_W_M; goto extract_sfmt_cmp_m_w_m;
-      case 142 : itype = CRISV32F_INSN_CMPS_M_B_M; goto extract_sfmt_cmp_m_b_m;
-      case 143 : itype = CRISV32F_INSN_CMPS_M_W_M; goto extract_sfmt_cmp_m_w_m;
-      case 144 : itype = CRISV32F_INSN_MULU_B; goto extract_sfmt_muls_b;
-      case 145 : itype = CRISV32F_INSN_MULU_W; goto extract_sfmt_muls_b;
-      case 146 : itype = CRISV32F_INSN_MULU_D; goto extract_sfmt_muls_b;
+      case 63 :
+        if ((base_insn & 0xfe0) == 0x3e0)
+          { itype = CRISV32F_INSN_LSRQ; goto extract_sfmt_asrq; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 64 :
+        if ((base_insn & 0xff0) == 0x400)
+          { itype = CRISV32F_INSN_ADDU_B_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 65 :
+        if ((base_insn & 0xff0) == 0x410)
+          { itype = CRISV32F_INSN_ADDU_W_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 66 :
+        if ((base_insn & 0xff0) == 0x420)
+          { itype = CRISV32F_INSN_ADDS_B_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 67 :
+        if ((base_insn & 0xff0) == 0x430)
+          { itype = CRISV32F_INSN_ADDS_W_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 68 :
+        if ((base_insn & 0xff0) == 0x440)
+          { itype = CRISV32F_INSN_MOVU_B_R; goto extract_sfmt_movs_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 69 :
+        if ((base_insn & 0xff0) == 0x450)
+          { itype = CRISV32F_INSN_MOVU_W_R; goto extract_sfmt_movs_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 70 :
+        if ((base_insn & 0xff0) == 0x460)
+          { itype = CRISV32F_INSN_MOVS_B_R; goto extract_sfmt_movs_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 71 :
+        if ((base_insn & 0xff0) == 0x470)
+          { itype = CRISV32F_INSN_MOVS_W_R; goto extract_sfmt_movs_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 72 :
+        if ((base_insn & 0xff0) == 0x480)
+          { itype = CRISV32F_INSN_SUBU_B_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 73 :
+        if ((base_insn & 0xff0) == 0x490)
+          { itype = CRISV32F_INSN_SUBU_W_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 74 :
+        if ((base_insn & 0xff0) == 0x4a0)
+          { itype = CRISV32F_INSN_SUBS_B_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 75 :
+        if ((base_insn & 0xff0) == 0x4b0)
+          { itype = CRISV32F_INSN_SUBS_W_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 76 :
+        if ((base_insn & 0xff0) == 0x4c0)
+          { itype = CRISV32F_INSN_LSLR_B_R; goto extract_sfmt_lsrr_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 77 :
+        if ((base_insn & 0xff0) == 0x4d0)
+          { itype = CRISV32F_INSN_LSLR_W_R; goto extract_sfmt_lsrr_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 78 :
+        if ((base_insn & 0xff0) == 0x4e0)
+          { itype = CRISV32F_INSN_LSLR_D_R; goto extract_sfmt_lsrr_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 79 :
+        if ((base_insn & 0xff0) == 0x4f0)
+          { itype = CRISV32F_INSN_BTST; goto extract_sfmt_btst; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 80 :
+        if ((base_insn & 0xff0) == 0x500)
+          { itype = CRISV32F_INSN_ADDI_B_R; goto extract_sfmt_addi_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 81 :
+        if ((base_insn & 0xff0) == 0x510)
+          { itype = CRISV32F_INSN_ADDI_W_R; goto extract_sfmt_addi_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 82 :
+        if ((base_insn & 0xff0) == 0x520)
+          { itype = CRISV32F_INSN_ADDI_D_R; goto extract_sfmt_addi_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 83 :
+        if ((base_insn & 0xff0) == 0x530)
+          { itype = CRISV32F_INSN_SCC; goto extract_sfmt_scc; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 84 :
+        if ((base_insn & 0xff0) == 0x540)
+          { itype = CRISV32F_INSN_ADDI_ACR_B_R; goto extract_sfmt_addi_acr_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 85 :
+        if ((base_insn & 0xff0) == 0x550)
+          { itype = CRISV32F_INSN_ADDI_ACR_W_R; goto extract_sfmt_addi_acr_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 86 :
+        if ((base_insn & 0xff0) == 0x560)
+          { itype = CRISV32F_INSN_ADDI_ACR_D_R; goto extract_sfmt_addi_acr_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 87 :
+        if ((base_insn & 0xff0) == 0x570)
+          { itype = CRISV32F_INSN_ADDC_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 88 :
+        if ((base_insn & 0xff0) == 0x580)
+          { itype = CRISV32F_INSN_NEG_B_R; goto extract_sfmt_neg_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 89 :
+        if ((base_insn & 0xff0) == 0x590)
+          { itype = CRISV32F_INSN_NEG_W_R; goto extract_sfmt_neg_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 90 :
+        if ((base_insn & 0xff0) == 0x5a0)
+          { itype = CRISV32F_INSN_NEG_D_R; goto extract_sfmt_neg_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 91 :
+        if ((base_insn & 0xff0) == 0x5b0)
+          { itype = CRISV32F_INSN_SETF; goto extract_sfmt_setf; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 92 :
+        if ((base_insn & 0xff0) == 0x5c0)
+          { itype = CRISV32F_INSN_BOUND_R_B_R; goto extract_sfmt_dstep; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 93 :
+        if ((base_insn & 0xff0) == 0x5d0)
+          { itype = CRISV32F_INSN_BOUND_R_W_R; goto extract_sfmt_dstep; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 94 :
+        if ((base_insn & 0xff0) == 0x5e0)
+          { itype = CRISV32F_INSN_BOUND_R_D_R; goto extract_sfmt_dstep; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 95 :
+        if ((base_insn & 0xff0) == 0x5f0)
+          { itype = CRISV32F_INSN_CLEARF; goto extract_sfmt_setf; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 96 :
+        if ((base_insn & 0xff0) == 0x600)
+          { itype = CRISV32F_INSN_ADD_B_R; goto extract_sfmt_add_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 97 :
+        if ((base_insn & 0xff0) == 0x610)
+          { itype = CRISV32F_INSN_ADD_W_R; goto extract_sfmt_add_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 98 :
+        if ((base_insn & 0xff0) == 0x620)
+          { itype = CRISV32F_INSN_ADD_D_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 99 :
+        if ((base_insn & 0xff0) == 0x630)
+          { itype = CRISV32F_INSN_MOVE_R_SPRV32; goto extract_sfmt_move_r_sprv32; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 100 :
+        if ((base_insn & 0xff0) == 0x640)
+          { itype = CRISV32F_INSN_MOVE_B_R; goto extract_sfmt_move_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 101 :
+        if ((base_insn & 0xff0) == 0x650)
+          { itype = CRISV32F_INSN_MOVE_W_R; goto extract_sfmt_move_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 102 :
+        if ((base_insn & 0xff0) == 0x660)
+          { itype = CRISV32F_INSN_MOVE_D_R; goto extract_sfmt_move_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 103 :
+        if ((base_insn & 0xff0) == 0x670)
+          { itype = CRISV32F_INSN_MOVE_SPR_RV32; goto extract_sfmt_move_spr_rv32; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 104 :
+        if ((base_insn & 0xff0) == 0x680)
+          { itype = CRISV32F_INSN_SUB_B_R; goto extract_sfmt_add_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 105 :
+        if ((base_insn & 0xff0) == 0x690)
+          { itype = CRISV32F_INSN_SUB_W_R; goto extract_sfmt_add_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 106 :
+        if ((base_insn & 0xff0) == 0x6a0)
+          { itype = CRISV32F_INSN_SUB_D_R; goto extract_sfmt_add_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 107 :
+        if ((base_insn & 0xff0) == 0x6b0)
+          { itype = CRISV32F_INSN_ABS; goto extract_sfmt_movs_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 108 :
+        if ((base_insn & 0xff0) == 0x6c0)
+          { itype = CRISV32F_INSN_CMP_R_B_R; goto extract_sfmt_cmp_r_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 109 :
+        if ((base_insn & 0xff0) == 0x6d0)
+          { itype = CRISV32F_INSN_CMP_R_W_R; goto extract_sfmt_cmp_r_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 110 :
+        if ((base_insn & 0xff0) == 0x6e0)
+          { itype = CRISV32F_INSN_CMP_R_D_R; goto extract_sfmt_cmp_r_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 111 :
+        if ((base_insn & 0xff0) == 0x6f0)
+          { itype = CRISV32F_INSN_DSTEP; goto extract_sfmt_dstep; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 112 :
+        if ((base_insn & 0xff0) == 0x700)
+          { itype = CRISV32F_INSN_AND_B_R; goto extract_sfmt_and_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 113 :
+        if ((base_insn & 0xff0) == 0x710)
+          { itype = CRISV32F_INSN_AND_W_R; goto extract_sfmt_and_w_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 114 :
+        if ((base_insn & 0xff0) == 0x720)
+          { itype = CRISV32F_INSN_AND_D_R; goto extract_sfmt_and_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 115 :
+        if ((base_insn & 0xff0) == 0x730)
+          { itype = CRISV32F_INSN_LZ; goto extract_sfmt_movs_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 116 :
+        if ((base_insn & 0xff0) == 0x740)
+          { itype = CRISV32F_INSN_ORR_B_R; goto extract_sfmt_and_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 117 :
+        if ((base_insn & 0xff0) == 0x750)
+          { itype = CRISV32F_INSN_ORR_W_R; goto extract_sfmt_and_w_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 118 :
+        if ((base_insn & 0xff0) == 0x760)
+          { itype = CRISV32F_INSN_ORR_D_R; goto extract_sfmt_and_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 119 :
+        if ((base_insn & 0xff0) == 0x770)
+          { itype = CRISV32F_INSN_SWAP; goto extract_sfmt_swap; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 120 :
+        if ((base_insn & 0xff0) == 0x780)
+          { itype = CRISV32F_INSN_ASRR_B_R; goto extract_sfmt_asrr_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 121 :
+        if ((base_insn & 0xff0) == 0x790)
+          { itype = CRISV32F_INSN_ASRR_W_R; goto extract_sfmt_asrr_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 122 :
+        if ((base_insn & 0xff0) == 0x7a0)
+          { itype = CRISV32F_INSN_ASRR_D_R; goto extract_sfmt_and_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 123 :
+        if ((base_insn & 0xff0) == 0x7b0)
+          { itype = CRISV32F_INSN_XOR; goto extract_sfmt_dstep; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 124 :
+        if ((base_insn & 0xff0) == 0x7c0)
+          { itype = CRISV32F_INSN_LSRR_B_R; goto extract_sfmt_lsrr_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 125 :
+        if ((base_insn & 0xff0) == 0x7d0)
+          { itype = CRISV32F_INSN_LSRR_W_R; goto extract_sfmt_lsrr_b_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 126 :
+        if ((base_insn & 0xff0) == 0x7e0)
+          { itype = CRISV32F_INSN_LSRR_D_R; goto extract_sfmt_lsrr_d_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 127 :
+        if ((base_insn & 0xff0) == 0x7f0)
+          { itype = CRISV32F_INSN_MCP; goto extract_sfmt_mcp; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 128 :
+        if ((base_insn & 0xbf0) == 0x800)
+          { itype = CRISV32F_INSN_ADDU_M_B_M; goto extract_sfmt_adds_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 129 :
+        if ((base_insn & 0xbf0) == 0x810)
+          { itype = CRISV32F_INSN_ADDU_M_W_M; goto extract_sfmt_adds_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 130 :
+        if ((base_insn & 0xbf0) == 0x820)
+          { itype = CRISV32F_INSN_ADDS_M_B_M; goto extract_sfmt_adds_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 131 :
+        if ((base_insn & 0xbf0) == 0x830)
+          { itype = CRISV32F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 132 :
+        if ((base_insn & 0xbf0) == 0x840)
+          { itype = CRISV32F_INSN_MOVU_M_B_M; goto extract_sfmt_movs_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 133 :
+        if ((base_insn & 0xbf0) == 0x850)
+          { itype = CRISV32F_INSN_MOVU_M_W_M; goto extract_sfmt_movs_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 134 :
+        if ((base_insn & 0xbf0) == 0x860)
+          { itype = CRISV32F_INSN_MOVS_M_B_M; goto extract_sfmt_movs_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 135 :
+        if ((base_insn & 0xbf0) == 0x870)
+          { itype = CRISV32F_INSN_MOVS_M_W_M; goto extract_sfmt_movs_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 136 :
+        if ((base_insn & 0xbf0) == 0x880)
+          { itype = CRISV32F_INSN_SUBU_M_B_M; goto extract_sfmt_adds_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 137 :
+        if ((base_insn & 0xbf0) == 0x890)
+          { itype = CRISV32F_INSN_SUBU_M_W_M; goto extract_sfmt_adds_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 138 :
+        if ((base_insn & 0xbf0) == 0x8a0)
+          { itype = CRISV32F_INSN_SUBS_M_B_M; goto extract_sfmt_adds_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 139 :
+        if ((base_insn & 0xbf0) == 0x8b0)
+          { itype = CRISV32F_INSN_SUBS_M_W_M; goto extract_sfmt_adds_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 140 :
+        if ((base_insn & 0xbf0) == 0x8c0)
+          { itype = CRISV32F_INSN_CMPU_M_B_M; goto extract_sfmt_cmp_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 141 :
+        if ((base_insn & 0xbf0) == 0x8d0)
+          { itype = CRISV32F_INSN_CMPU_M_W_M; goto extract_sfmt_cmp_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 142 :
+        if ((base_insn & 0xbf0) == 0x8e0)
+          { itype = CRISV32F_INSN_CMPS_M_B_M; goto extract_sfmt_cmp_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 143 :
+        if ((base_insn & 0xbf0) == 0x8f0)
+          { itype = CRISV32F_INSN_CMPS_M_W_M; goto extract_sfmt_cmp_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 144 :
+        if ((base_insn & 0xff0) == 0x900)
+          { itype = CRISV32F_INSN_MULU_B; goto extract_sfmt_muls_b; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 145 :
+        if ((base_insn & 0xff0) == 0x910)
+          { itype = CRISV32F_INSN_MULU_W; goto extract_sfmt_muls_b; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 146 :
+        if ((base_insn & 0xff0) == 0x920)
+          { itype = CRISV32F_INSN_MULU_D; goto extract_sfmt_muls_b; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 147 :
         {
           unsigned int val = (((insn >> 12) & (15 << 0)));
           switch (val)
           {
-          case 2 : itype = CRISV32F_INSN_RFE; goto extract_sfmt_rfe;
-          case 3 : itype = CRISV32F_INSN_SFE; goto extract_sfmt_sfe;
-          case 4 : itype = CRISV32F_INSN_RFG; goto extract_sfmt_rfg;
-          case 5 : itype = CRISV32F_INSN_RFN; goto extract_sfmt_rfn;
-          case 14 : itype = CRISV32F_INSN_BREAK; goto extract_sfmt_break;
-          case 15 : itype = CRISV32F_INSN_HALT; goto extract_sfmt_halt;
+          case 2 :
+            if ((base_insn & 0xffff) == 0x2930)
+              { itype = CRISV32F_INSN_RFE; goto extract_sfmt_rfe; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 3 :
+            if ((base_insn & 0xffff) == 0x3930)
+              { itype = CRISV32F_INSN_SFE; goto extract_sfmt_sfe; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 4 :
+            if ((base_insn & 0xffff) == 0x4930)
+              { itype = CRISV32F_INSN_RFG; goto extract_sfmt_rfg; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 5 :
+            if ((base_insn & 0xffff) == 0x5930)
+              { itype = CRISV32F_INSN_RFN; goto extract_sfmt_rfn; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 14 :
+            if ((base_insn & 0xfff0) == 0xe930)
+              { itype = CRISV32F_INSN_BREAK; goto extract_sfmt_break; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xffff) == 0xf930)
+              { itype = CRISV32F_INSN_HALT; goto extract_sfmt_halt; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 148 : itype = CRISV32F_INSN_ADDO_M_B_M; goto extract_sfmt_addo_m_b_m;
-      case 149 : itype = CRISV32F_INSN_ADDO_M_W_M; goto extract_sfmt_addo_m_w_m;
-      case 150 : itype = CRISV32F_INSN_ADDO_M_D_M; goto extract_sfmt_addo_m_d_m;
-      case 151 : itype = CRISV32F_INSN_LAPCQ; goto extract_sfmt_lapcq;
-      case 154 : itype = CRISV32F_INSN_ADDC_M; goto extract_sfmt_addc_m;
-      case 155 : itype = CRISV32F_INSN_JAS_R; goto extract_sfmt_jas_r;
-      case 159 : itype = CRISV32F_INSN_JUMP_P; goto extract_sfmt_jump_p;
-      case 160 : itype = CRISV32F_INSN_ADD_M_B_M; goto extract_sfmt_add_m_b_m;
-      case 161 : itype = CRISV32F_INSN_ADD_M_W_M; goto extract_sfmt_add_m_w_m;
-      case 162 : itype = CRISV32F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m;
-      case 163 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-      case 164 : itype = CRISV32F_INSN_MOVE_M_B_M; goto extract_sfmt_move_m_b_m;
-      case 165 : itype = CRISV32F_INSN_MOVE_M_W_M; goto extract_sfmt_move_m_w_m;
-      case 166 : itype = CRISV32F_INSN_MOVE_M_D_M; goto extract_sfmt_move_m_d_m;
+      case 148 :
+        if ((base_insn & 0xbf0) == 0x940)
+          { itype = CRISV32F_INSN_ADDO_M_B_M; goto extract_sfmt_addo_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 149 :
+        if ((base_insn & 0xbf0) == 0x950)
+          { itype = CRISV32F_INSN_ADDO_M_W_M; goto extract_sfmt_addo_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 150 :
+        if ((base_insn & 0xbf0) == 0x960)
+          { itype = CRISV32F_INSN_ADDO_M_D_M; goto extract_sfmt_addo_m_d_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 151 :
+        if ((base_insn & 0xff0) == 0x970)
+          { itype = CRISV32F_INSN_LAPCQ; goto extract_sfmt_lapcq; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 154 :
+        if ((base_insn & 0xbf0) == 0x9a0)
+          { itype = CRISV32F_INSN_ADDC_M; goto extract_sfmt_addc_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 155 :
+        if ((base_insn & 0xff0) == 0x9b0)
+          { itype = CRISV32F_INSN_JAS_R; goto extract_sfmt_jas_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 159 :
+        if ((base_insn & 0xfff) == 0x9f0)
+          { itype = CRISV32F_INSN_JUMP_P; goto extract_sfmt_jump_p; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 160 :
+        if ((base_insn & 0xbf0) == 0xa00)
+          { itype = CRISV32F_INSN_ADD_M_B_M; goto extract_sfmt_add_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 161 :
+        if ((base_insn & 0xbf0) == 0xa10)
+          { itype = CRISV32F_INSN_ADD_M_W_M; goto extract_sfmt_add_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 162 :
+        if ((base_insn & 0xbf0) == 0xa20)
+          { itype = CRISV32F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 163 :
+        if ((base_insn & 0xbf0) == 0xa30)
+          { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 164 :
+        if ((base_insn & 0xbf0) == 0xa40)
+          { itype = CRISV32F_INSN_MOVE_M_B_M; goto extract_sfmt_move_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 165 :
+        if ((base_insn & 0xbf0) == 0xa50)
+          { itype = CRISV32F_INSN_MOVE_M_W_M; goto extract_sfmt_move_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 166 :
+        if ((base_insn & 0xbf0) == 0xa60)
+          { itype = CRISV32F_INSN_MOVE_M_D_M; goto extract_sfmt_move_m_d_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 167 : /* fall through */
-      case 231 : itype = CRISV32F_INSN_MOVE_SPR_MV32; goto extract_sfmt_move_spr_mv32;
-      case 168 : itype = CRISV32F_INSN_SUB_M_B_M; goto extract_sfmt_add_m_b_m;
-      case 169 : itype = CRISV32F_INSN_SUB_M_W_M; goto extract_sfmt_add_m_w_m;
-      case 170 : itype = CRISV32F_INSN_SUB_M_D_M; goto extract_sfmt_add_m_d_m;
+      case 231 :
+        if ((base_insn & 0xbf0) == 0xa70)
+          { itype = CRISV32F_INSN_MOVE_SPR_MV32; goto extract_sfmt_move_spr_mv32; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 168 :
+        if ((base_insn & 0xbf0) == 0xa80)
+          { itype = CRISV32F_INSN_SUB_M_B_M; goto extract_sfmt_add_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 169 :
+        if ((base_insn & 0xbf0) == 0xa90)
+          { itype = CRISV32F_INSN_SUB_M_W_M; goto extract_sfmt_add_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 170 :
+        if ((base_insn & 0xbf0) == 0xaa0)
+          { itype = CRISV32F_INSN_SUB_M_D_M; goto extract_sfmt_add_m_d_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 171 :
         {
           unsigned int val = (((insn >> 12) & (1 << 0)));
           switch (val)
           {
-          case 0 : itype = CRISV32F_INSN_FIDXD; goto extract_sfmt_fidxi;
-          case 1 : itype = CRISV32F_INSN_FTAGD; goto extract_sfmt_fidxi;
+          case 0 :
+            if ((base_insn & 0xfff0) == 0xab0)
+              { itype = CRISV32F_INSN_FIDXD; goto extract_sfmt_fidxi; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 1 :
+            if ((base_insn & 0xfff0) == 0x1ab0)
+              { itype = CRISV32F_INSN_FTAGD; goto extract_sfmt_fidxi; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 172 : itype = CRISV32F_INSN_CMP_M_B_M; goto extract_sfmt_cmp_m_b_m;
-      case 173 : itype = CRISV32F_INSN_CMP_M_W_M; goto extract_sfmt_cmp_m_w_m;
-      case 174 : itype = CRISV32F_INSN_CMP_M_D_M; goto extract_sfmt_cmp_m_d_m;
-      case 176 : itype = CRISV32F_INSN_AND_M_B_M; goto extract_sfmt_and_m_b_m;
-      case 177 : itype = CRISV32F_INSN_AND_M_W_M; goto extract_sfmt_and_m_w_m;
-      case 178 : itype = CRISV32F_INSN_AND_M_D_M; goto extract_sfmt_and_m_d_m;
-      case 179 : itype = CRISV32F_INSN_JASC_R; goto extract_sfmt_jasc_r;
-      case 180 : itype = CRISV32F_INSN_OR_M_B_M; goto extract_sfmt_and_m_b_m;
-      case 181 : itype = CRISV32F_INSN_OR_M_W_M; goto extract_sfmt_and_m_w_m;
-      case 182 : itype = CRISV32F_INSN_OR_M_D_M; goto extract_sfmt_and_m_d_m;
-      case 183 : itype = CRISV32F_INSN_MOVE_R_SS; goto extract_sfmt_move_r_ss;
+      case 172 :
+        if ((base_insn & 0xbf0) == 0xac0)
+          { itype = CRISV32F_INSN_CMP_M_B_M; goto extract_sfmt_cmp_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 173 :
+        if ((base_insn & 0xbf0) == 0xad0)
+          { itype = CRISV32F_INSN_CMP_M_W_M; goto extract_sfmt_cmp_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 174 :
+        if ((base_insn & 0xbf0) == 0xae0)
+          { itype = CRISV32F_INSN_CMP_M_D_M; goto extract_sfmt_cmp_m_d_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 176 :
+        if ((base_insn & 0xbf0) == 0xb00)
+          { itype = CRISV32F_INSN_AND_M_B_M; goto extract_sfmt_and_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 177 :
+        if ((base_insn & 0xbf0) == 0xb10)
+          { itype = CRISV32F_INSN_AND_M_W_M; goto extract_sfmt_and_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 178 :
+        if ((base_insn & 0xbf0) == 0xb20)
+          { itype = CRISV32F_INSN_AND_M_D_M; goto extract_sfmt_and_m_d_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 179 :
+        if ((base_insn & 0xff0) == 0xb30)
+          { itype = CRISV32F_INSN_JASC_R; goto extract_sfmt_jasc_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 180 :
+        if ((base_insn & 0xbf0) == 0xb40)
+          { itype = CRISV32F_INSN_OR_M_B_M; goto extract_sfmt_and_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 181 :
+        if ((base_insn & 0xbf0) == 0xb50)
+          { itype = CRISV32F_INSN_OR_M_W_M; goto extract_sfmt_and_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 182 :
+        if ((base_insn & 0xbf0) == 0xb60)
+          { itype = CRISV32F_INSN_OR_M_D_M; goto extract_sfmt_and_m_d_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 183 :
+        if ((base_insn & 0xff0) == 0xb70)
+          { itype = CRISV32F_INSN_MOVE_R_SS; goto extract_sfmt_move_r_ss; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 184 : /* fall through */
-      case 248 : itype = CRISV32F_INSN_TEST_M_B_M; goto extract_sfmt_test_m_b_m;
+      case 248 :
+        if ((base_insn & 0xfbf0) == 0xb80)
+          { itype = CRISV32F_INSN_TEST_M_B_M; goto extract_sfmt_test_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 185 : /* fall through */
-      case 249 : itype = CRISV32F_INSN_TEST_M_W_M; goto extract_sfmt_test_m_w_m;
+      case 249 :
+        if ((base_insn & 0xfbf0) == 0xb90)
+          { itype = CRISV32F_INSN_TEST_M_W_M; goto extract_sfmt_test_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 186 : /* fall through */
-      case 250 : itype = CRISV32F_INSN_TEST_M_D_M; goto extract_sfmt_test_m_d_m;
+      case 250 :
+        if ((base_insn & 0xfbf0) == 0xba0)
+          { itype = CRISV32F_INSN_TEST_M_D_M; goto extract_sfmt_test_m_d_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 187 : /* fall through */
-      case 251 : itype = CRISV32F_INSN_MOVEM_M_R_V32; goto extract_sfmt_movem_m_r_v32;
+      case 251 :
+        if ((base_insn & 0xbf0) == 0xbb0)
+          { itype = CRISV32F_INSN_MOVEM_M_R_V32; goto extract_sfmt_movem_m_r_v32; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 188 : /* fall through */
-      case 252 : itype = CRISV32F_INSN_MOVE_R_M_B_M; goto extract_sfmt_move_r_m_b_m;
+      case 252 :
+        if ((base_insn & 0xbf0) == 0xbc0)
+          { itype = CRISV32F_INSN_MOVE_R_M_B_M; goto extract_sfmt_move_r_m_b_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 189 : /* fall through */
-      case 253 : itype = CRISV32F_INSN_MOVE_R_M_W_M; goto extract_sfmt_move_r_m_w_m;
+      case 253 :
+        if ((base_insn & 0xbf0) == 0xbd0)
+          { itype = CRISV32F_INSN_MOVE_R_M_W_M; goto extract_sfmt_move_r_m_w_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 190 : /* fall through */
-      case 254 : itype = CRISV32F_INSN_MOVE_R_M_D_M; goto extract_sfmt_move_r_m_d_m;
+      case 254 :
+        if ((base_insn & 0xbf0) == 0xbe0)
+          { itype = CRISV32F_INSN_MOVE_R_M_D_M; goto extract_sfmt_move_r_m_d_m; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 191 : /* fall through */
-      case 255 : itype = CRISV32F_INSN_MOVEM_R_M_V32; goto extract_sfmt_movem_r_m_v32;
+      case 255 :
+        if ((base_insn & 0xbf0) == 0xbf0)
+          { itype = CRISV32F_INSN_MOVEM_R_M_V32; goto extract_sfmt_movem_r_m_v32; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 192 :
         {
           unsigned int val = (((insn >> 0) & (15 << 0)));
@@ -596,8 +1019,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_ADDU_M_B_M; goto extract_sfmt_adds_m_b_m;
-          case 15 : itype = CRISV32F_INSN_ADDUCBR; goto extract_sfmt_addscbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x800)
+              { itype = CRISV32F_INSN_ADDU_M_B_M; goto extract_sfmt_adds_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc0f)
+              { itype = CRISV32F_INSN_ADDUCBR; goto extract_sfmt_addscbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -620,8 +1049,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_ADDU_M_W_M; goto extract_sfmt_adds_m_w_m;
-          case 15 : itype = CRISV32F_INSN_ADDUCWR; goto extract_sfmt_addscwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x810)
+              { itype = CRISV32F_INSN_ADDU_M_W_M; goto extract_sfmt_adds_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc1f)
+              { itype = CRISV32F_INSN_ADDUCWR; goto extract_sfmt_addscwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -644,8 +1079,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_ADDS_M_B_M; goto extract_sfmt_adds_m_b_m;
-          case 15 : itype = CRISV32F_INSN_ADDSCBR; goto extract_sfmt_addscbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x820)
+              { itype = CRISV32F_INSN_ADDS_M_B_M; goto extract_sfmt_adds_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc2f)
+              { itype = CRISV32F_INSN_ADDSCBR; goto extract_sfmt_addscbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -668,8 +1109,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m;
-          case 15 : itype = CRISV32F_INSN_ADDSCWR; goto extract_sfmt_addscwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x830)
+              { itype = CRISV32F_INSN_ADDS_M_W_M; goto extract_sfmt_adds_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc3f)
+              { itype = CRISV32F_INSN_ADDSCWR; goto extract_sfmt_addscwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -692,8 +1139,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_MOVU_M_B_M; goto extract_sfmt_movs_m_b_m;
-          case 15 : itype = CRISV32F_INSN_MOVUCBR; goto extract_sfmt_movucbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x840)
+              { itype = CRISV32F_INSN_MOVU_M_B_M; goto extract_sfmt_movs_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc4f)
+              { itype = CRISV32F_INSN_MOVUCBR; goto extract_sfmt_movucbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -716,8 +1169,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_MOVU_M_W_M; goto extract_sfmt_movs_m_w_m;
-          case 15 : itype = CRISV32F_INSN_MOVUCWR; goto extract_sfmt_movucwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x850)
+              { itype = CRISV32F_INSN_MOVU_M_W_M; goto extract_sfmt_movs_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc5f)
+              { itype = CRISV32F_INSN_MOVUCWR; goto extract_sfmt_movucwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -740,8 +1199,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_MOVS_M_B_M; goto extract_sfmt_movs_m_b_m;
-          case 15 : itype = CRISV32F_INSN_MOVSCBR; goto extract_sfmt_movscbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x860)
+              { itype = CRISV32F_INSN_MOVS_M_B_M; goto extract_sfmt_movs_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc6f)
+              { itype = CRISV32F_INSN_MOVSCBR; goto extract_sfmt_movscbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -764,8 +1229,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_MOVS_M_W_M; goto extract_sfmt_movs_m_w_m;
-          case 15 : itype = CRISV32F_INSN_MOVSCWR; goto extract_sfmt_movscwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x870)
+              { itype = CRISV32F_INSN_MOVS_M_W_M; goto extract_sfmt_movs_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc7f)
+              { itype = CRISV32F_INSN_MOVSCWR; goto extract_sfmt_movscwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -788,8 +1259,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_SUBU_M_B_M; goto extract_sfmt_adds_m_b_m;
-          case 15 : itype = CRISV32F_INSN_SUBUCBR; goto extract_sfmt_addscbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x880)
+              { itype = CRISV32F_INSN_SUBU_M_B_M; goto extract_sfmt_adds_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc8f)
+              { itype = CRISV32F_INSN_SUBUCBR; goto extract_sfmt_addscbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -812,8 +1289,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_SUBU_M_W_M; goto extract_sfmt_adds_m_w_m;
-          case 15 : itype = CRISV32F_INSN_SUBUCWR; goto extract_sfmt_addscwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x890)
+              { itype = CRISV32F_INSN_SUBU_M_W_M; goto extract_sfmt_adds_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xc9f)
+              { itype = CRISV32F_INSN_SUBUCWR; goto extract_sfmt_addscwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -836,8 +1319,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_SUBS_M_B_M; goto extract_sfmt_adds_m_b_m;
-          case 15 : itype = CRISV32F_INSN_SUBSCBR; goto extract_sfmt_addscbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x8a0)
+              { itype = CRISV32F_INSN_SUBS_M_B_M; goto extract_sfmt_adds_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xcaf)
+              { itype = CRISV32F_INSN_SUBSCBR; goto extract_sfmt_addscbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -860,8 +1349,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_SUBS_M_W_M; goto extract_sfmt_adds_m_w_m;
-          case 15 : itype = CRISV32F_INSN_SUBSCWR; goto extract_sfmt_addscwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x8b0)
+              { itype = CRISV32F_INSN_SUBS_M_W_M; goto extract_sfmt_adds_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xcbf)
+              { itype = CRISV32F_INSN_SUBSCWR; goto extract_sfmt_addscwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -884,8 +1379,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_CMPU_M_B_M; goto extract_sfmt_cmp_m_b_m;
-          case 15 : itype = CRISV32F_INSN_CMPUCBR; goto extract_sfmt_cmpucbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x8c0)
+              { itype = CRISV32F_INSN_CMPU_M_B_M; goto extract_sfmt_cmp_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xccf)
+              { itype = CRISV32F_INSN_CMPUCBR; goto extract_sfmt_cmpucbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -908,8 +1409,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_CMPU_M_W_M; goto extract_sfmt_cmp_m_w_m;
-          case 15 : itype = CRISV32F_INSN_CMPUCWR; goto extract_sfmt_cmpucwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x8d0)
+              { itype = CRISV32F_INSN_CMPU_M_W_M; goto extract_sfmt_cmp_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xcdf)
+              { itype = CRISV32F_INSN_CMPUCWR; goto extract_sfmt_cmpucwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -932,8 +1439,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_CMPS_M_B_M; goto extract_sfmt_cmp_m_b_m;
-          case 15 : itype = CRISV32F_INSN_CMPSCBR; goto extract_sfmt_cmpcbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x8e0)
+              { itype = CRISV32F_INSN_CMPS_M_B_M; goto extract_sfmt_cmp_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xcef)
+              { itype = CRISV32F_INSN_CMPSCBR; goto extract_sfmt_cmpcbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -956,21 +1469,42 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_CMPS_M_W_M; goto extract_sfmt_cmp_m_w_m;
-          case 15 : itype = CRISV32F_INSN_CMPSCWR; goto extract_sfmt_cmpcwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x8f0)
+              { itype = CRISV32F_INSN_CMPS_M_W_M; goto extract_sfmt_cmp_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xcff)
+              { itype = CRISV32F_INSN_CMPSCWR; goto extract_sfmt_cmpcwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 208 : itype = CRISV32F_INSN_MULS_B; goto extract_sfmt_muls_b;
-      case 209 : itype = CRISV32F_INSN_MULS_W; goto extract_sfmt_muls_b;
-      case 210 : itype = CRISV32F_INSN_MULS_D; goto extract_sfmt_muls_b;
+      case 208 :
+        if ((base_insn & 0xff0) == 0xd00)
+          { itype = CRISV32F_INSN_MULS_B; goto extract_sfmt_muls_b; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 209 :
+        if ((base_insn & 0xff0) == 0xd10)
+          { itype = CRISV32F_INSN_MULS_W; goto extract_sfmt_muls_b; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 210 :
+        if ((base_insn & 0xff0) == 0xd20)
+          { itype = CRISV32F_INSN_MULS_D; goto extract_sfmt_muls_b; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 211 :
         {
           unsigned int val = (((insn >> 12) & (1 << 0)));
           switch (val)
           {
-          case 0 : itype = CRISV32F_INSN_FIDXI; goto extract_sfmt_fidxi;
-          case 1 : itype = CRISV32F_INSN_FTAGI; goto extract_sfmt_fidxi;
+          case 0 :
+            if ((base_insn & 0xfff0) == 0xd30)
+              { itype = CRISV32F_INSN_FIDXI; goto extract_sfmt_fidxi; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 1 :
+            if ((base_insn & 0xfff0) == 0x1d30)
+              { itype = CRISV32F_INSN_FTAGI; goto extract_sfmt_fidxi; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -993,8 +1527,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_ADDO_M_B_M; goto extract_sfmt_addo_m_b_m;
-          case 15 : itype = CRISV32F_INSN_ADDO_CB; goto extract_sfmt_addo_cb;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x940)
+              { itype = CRISV32F_INSN_ADDO_M_B_M; goto extract_sfmt_addo_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xd4f)
+              { itype = CRISV32F_INSN_ADDO_CB; goto extract_sfmt_addo_cb; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1017,8 +1557,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_ADDO_M_W_M; goto extract_sfmt_addo_m_w_m;
-          case 15 : itype = CRISV32F_INSN_ADDO_CW; goto extract_sfmt_addo_cw;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x950)
+              { itype = CRISV32F_INSN_ADDO_M_W_M; goto extract_sfmt_addo_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xd5f)
+              { itype = CRISV32F_INSN_ADDO_CW; goto extract_sfmt_addo_cw; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1041,12 +1587,21 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_ADDO_M_D_M; goto extract_sfmt_addo_m_d_m;
-          case 15 : itype = CRISV32F_INSN_ADDO_CD; goto extract_sfmt_addo_cd;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x960)
+              { itype = CRISV32F_INSN_ADDO_M_D_M; goto extract_sfmt_addo_m_d_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xd6f)
+              { itype = CRISV32F_INSN_ADDO_CD; goto extract_sfmt_addo_cd; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 215 : itype = CRISV32F_INSN_LAPC_D; goto extract_sfmt_lapc_d;
+      case 215 :
+        if ((base_insn & 0xfff) == 0xd7f)
+          { itype = CRISV32F_INSN_LAPC_D; goto extract_sfmt_lapc_d; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 218 :
         {
           unsigned int val = (((insn >> 0) & (15 << 0)));
@@ -1066,15 +1621,33 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_ADDC_M; goto extract_sfmt_addc_m;
-          case 15 : itype = CRISV32F_INSN_ADDC_C; goto extract_sfmt_addcdr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0x9a0)
+              { itype = CRISV32F_INSN_ADDC_M; goto extract_sfmt_addc_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xdaf)
+              { itype = CRISV32F_INSN_ADDC_C; goto extract_sfmt_addcdr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 219 : itype = CRISV32F_INSN_JAS_C; goto extract_sfmt_jas_c;
-      case 220 : itype = CRISV32F_INSN_BOUND_CB; goto extract_sfmt_bound_cb;
-      case 221 : itype = CRISV32F_INSN_BOUND_CW; goto extract_sfmt_bound_cw;
-      case 222 : itype = CRISV32F_INSN_BOUND_CD; goto extract_sfmt_bound_cd;
+      case 219 :
+        if ((base_insn & 0xfff) == 0xdbf)
+          { itype = CRISV32F_INSN_JAS_C; goto extract_sfmt_jas_c; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 220 :
+        if ((base_insn & 0xfff) == 0xdcf)
+          { itype = CRISV32F_INSN_BOUND_CB; goto extract_sfmt_bound_cb; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 221 :
+        if ((base_insn & 0xfff) == 0xddf)
+          { itype = CRISV32F_INSN_BOUND_CW; goto extract_sfmt_bound_cw; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+      case 222 :
+        if ((base_insn & 0xfff) == 0xdef)
+          { itype = CRISV32F_INSN_BOUND_CD; goto extract_sfmt_bound_cd; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 223 :
         {
           unsigned int val = (((insn >> 12) & (15 << 0)));
@@ -1094,8 +1667,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 15 : itype = CRISV32F_INSN_BCC_W; goto extract_sfmt_bcc_w;
-          case 14 : itype = CRISV32F_INSN_BA_W; goto extract_sfmt_ba_w;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xdff)
+              { itype = CRISV32F_INSN_BCC_W; goto extract_sfmt_bcc_w; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 14 :
+            if ((base_insn & 0xffff) == 0xedff)
+              { itype = CRISV32F_INSN_BA_W; goto extract_sfmt_ba_w; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1118,8 +1697,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_ADD_M_B_M; goto extract_sfmt_add_m_b_m;
-          case 15 : itype = CRISV32F_INSN_ADDCBR; goto extract_sfmt_addcbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa00)
+              { itype = CRISV32F_INSN_ADD_M_B_M; goto extract_sfmt_add_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe0f)
+              { itype = CRISV32F_INSN_ADDCBR; goto extract_sfmt_addcbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1142,8 +1727,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_ADD_M_W_M; goto extract_sfmt_add_m_w_m;
-          case 15 : itype = CRISV32F_INSN_ADDCWR; goto extract_sfmt_addcwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa10)
+              { itype = CRISV32F_INSN_ADD_M_W_M; goto extract_sfmt_add_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe1f)
+              { itype = CRISV32F_INSN_ADDCWR; goto extract_sfmt_addcwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1166,8 +1757,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m;
-          case 15 : itype = CRISV32F_INSN_ADDCDR; goto extract_sfmt_addcdr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa20)
+              { itype = CRISV32F_INSN_ADD_M_D_M; goto extract_sfmt_add_m_d_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe2f)
+              { itype = CRISV32F_INSN_ADDCDR; goto extract_sfmt_addcdr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1195,8 +1792,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P0; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xe3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P0; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1219,8 +1822,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P1; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x1e3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P1; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1243,8 +1852,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P2; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x2e3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P2; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1267,8 +1882,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P3; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x3e3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P3; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1291,8 +1912,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P4; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x4e3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P4; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1315,8 +1942,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P5; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x5e3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P5; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1339,8 +1972,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P6; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x6e3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P6; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1363,8 +2002,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P7; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x7e3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P7; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1387,8 +2032,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P8; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x8e3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P8; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1411,8 +2062,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P9; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0x9e3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P9; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1435,8 +2092,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P10; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xae3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P10; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1459,8 +2122,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P11; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xbe3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P11; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1483,8 +2152,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P12; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xce3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P12; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1507,8 +2182,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P13; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xde3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P13; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1531,8 +2212,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P14; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xee3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P14; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1555,8 +2242,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
               case 11 : /* fall through */
               case 12 : /* fall through */
               case 13 : /* fall through */
-              case 14 : itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32;
-              case 15 : itype = CRISV32F_INSN_MOVE_C_SPRV32_P15; goto extract_sfmt_move_c_sprv32_p0;
+              case 14 :
+                if ((base_insn & 0xbf0) == 0xa30)
+                  { itype = CRISV32F_INSN_MOVE_M_SPRV32; goto extract_sfmt_move_m_sprv32; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+              case 15 :
+                if ((base_insn & 0xffff) == 0xfe3f)
+                  { itype = CRISV32F_INSN_MOVE_C_SPRV32_P15; goto extract_sfmt_move_c_sprv32_p0; }
+                itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
               }
             }
@@ -1582,8 +2275,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_MOVE_M_B_M; goto extract_sfmt_move_m_b_m;
-          case 15 : itype = CRISV32F_INSN_MOVECBR; goto extract_sfmt_movecbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa40)
+              { itype = CRISV32F_INSN_MOVE_M_B_M; goto extract_sfmt_move_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe4f)
+              { itype = CRISV32F_INSN_MOVECBR; goto extract_sfmt_movecbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1606,8 +2305,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_MOVE_M_W_M; goto extract_sfmt_move_m_w_m;
-          case 15 : itype = CRISV32F_INSN_MOVECWR; goto extract_sfmt_movecwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa50)
+              { itype = CRISV32F_INSN_MOVE_M_W_M; goto extract_sfmt_move_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe5f)
+              { itype = CRISV32F_INSN_MOVECWR; goto extract_sfmt_movecwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1630,8 +2335,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_MOVE_M_D_M; goto extract_sfmt_move_m_d_m;
-          case 15 : itype = CRISV32F_INSN_MOVECDR; goto extract_sfmt_movecdr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa60)
+              { itype = CRISV32F_INSN_MOVE_M_D_M; goto extract_sfmt_move_m_d_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe6f)
+              { itype = CRISV32F_INSN_MOVECDR; goto extract_sfmt_movecdr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1654,8 +2365,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_SUB_M_B_M; goto extract_sfmt_add_m_b_m;
-          case 15 : itype = CRISV32F_INSN_SUBCBR; goto extract_sfmt_addcbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa80)
+              { itype = CRISV32F_INSN_SUB_M_B_M; goto extract_sfmt_add_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe8f)
+              { itype = CRISV32F_INSN_SUBCBR; goto extract_sfmt_addcbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1678,8 +2395,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_SUB_M_W_M; goto extract_sfmt_add_m_w_m;
-          case 15 : itype = CRISV32F_INSN_SUBCWR; goto extract_sfmt_addcwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xa90)
+              { itype = CRISV32F_INSN_SUB_M_W_M; goto extract_sfmt_add_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xe9f)
+              { itype = CRISV32F_INSN_SUBCWR; goto extract_sfmt_addcwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1702,12 +2425,21 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_SUB_M_D_M; goto extract_sfmt_add_m_d_m;
-          case 15 : itype = CRISV32F_INSN_SUBCDR; goto extract_sfmt_addcdr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xaa0)
+              { itype = CRISV32F_INSN_SUB_M_D_M; goto extract_sfmt_add_m_d_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xeaf)
+              { itype = CRISV32F_INSN_SUBCDR; goto extract_sfmt_addcdr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 235 : itype = CRISV32F_INSN_BAS_C; goto extract_sfmt_bas_c;
+      case 235 :
+        if ((base_insn & 0xfff) == 0xebf)
+          { itype = CRISV32F_INSN_BAS_C; goto extract_sfmt_bas_c; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 236 :
         {
           unsigned int val = (((insn >> 0) & (15 << 0)));
@@ -1727,8 +2459,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_CMP_M_B_M; goto extract_sfmt_cmp_m_b_m;
-          case 15 : itype = CRISV32F_INSN_CMPCBR; goto extract_sfmt_cmpcbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xac0)
+              { itype = CRISV32F_INSN_CMP_M_B_M; goto extract_sfmt_cmp_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xecf)
+              { itype = CRISV32F_INSN_CMPCBR; goto extract_sfmt_cmpcbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1751,8 +2489,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_CMP_M_W_M; goto extract_sfmt_cmp_m_w_m;
-          case 15 : itype = CRISV32F_INSN_CMPCWR; goto extract_sfmt_cmpcwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xad0)
+              { itype = CRISV32F_INSN_CMP_M_W_M; goto extract_sfmt_cmp_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xedf)
+              { itype = CRISV32F_INSN_CMPCWR; goto extract_sfmt_cmpcwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1775,12 +2519,21 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_CMP_M_D_M; goto extract_sfmt_cmp_m_d_m;
-          case 15 : itype = CRISV32F_INSN_CMPCDR; goto extract_sfmt_cmpcdr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xae0)
+              { itype = CRISV32F_INSN_CMP_M_D_M; goto extract_sfmt_cmp_m_d_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xeef)
+              { itype = CRISV32F_INSN_CMPCDR; goto extract_sfmt_cmpcdr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 239 : itype = CRISV32F_INSN_BASC_C; goto extract_sfmt_bas_c;
+      case 239 :
+        if ((base_insn & 0xfff) == 0xeff)
+          { itype = CRISV32F_INSN_BASC_C; goto extract_sfmt_bas_c; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 240 :
         {
           unsigned int val = (((insn >> 0) & (15 << 0)));
@@ -1800,8 +2553,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_AND_M_B_M; goto extract_sfmt_and_m_b_m;
-          case 15 : itype = CRISV32F_INSN_ANDCBR; goto extract_sfmt_andcbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xb00)
+              { itype = CRISV32F_INSN_AND_M_B_M; goto extract_sfmt_and_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xf0f)
+              { itype = CRISV32F_INSN_ANDCBR; goto extract_sfmt_andcbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1824,8 +2583,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_AND_M_W_M; goto extract_sfmt_and_m_w_m;
-          case 15 : itype = CRISV32F_INSN_ANDCWR; goto extract_sfmt_andcwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xb10)
+              { itype = CRISV32F_INSN_AND_M_W_M; goto extract_sfmt_and_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xf1f)
+              { itype = CRISV32F_INSN_ANDCWR; goto extract_sfmt_andcwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1848,12 +2613,21 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_AND_M_D_M; goto extract_sfmt_and_m_d_m;
-          case 15 : itype = CRISV32F_INSN_ANDCDR; goto extract_sfmt_andcdr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xb20)
+              { itype = CRISV32F_INSN_AND_M_D_M; goto extract_sfmt_and_m_d_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xf2f)
+              { itype = CRISV32F_INSN_ANDCDR; goto extract_sfmt_andcdr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 243 : itype = CRISV32F_INSN_JASC_C; goto extract_sfmt_jas_c;
+      case 243 :
+        if ((base_insn & 0xfff) == 0xf3f)
+          { itype = CRISV32F_INSN_JASC_C; goto extract_sfmt_jas_c; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       case 244 :
         {
           unsigned int val = (((insn >> 0) & (15 << 0)));
@@ -1873,8 +2647,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_OR_M_B_M; goto extract_sfmt_and_m_b_m;
-          case 15 : itype = CRISV32F_INSN_ORCBR; goto extract_sfmt_andcbr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xb40)
+              { itype = CRISV32F_INSN_OR_M_B_M; goto extract_sfmt_and_m_b_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xf4f)
+              { itype = CRISV32F_INSN_ORCBR; goto extract_sfmt_andcbr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1897,8 +2677,14 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_OR_M_W_M; goto extract_sfmt_and_m_w_m;
-          case 15 : itype = CRISV32F_INSN_ORCWR; goto extract_sfmt_andcwr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xb50)
+              { itype = CRISV32F_INSN_OR_M_W_M; goto extract_sfmt_and_m_w_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xf5f)
+              { itype = CRISV32F_INSN_ORCWR; goto extract_sfmt_andcwr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
@@ -1921,12 +2707,21 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
           case 11 : /* fall through */
           case 12 : /* fall through */
           case 13 : /* fall through */
-          case 14 : itype = CRISV32F_INSN_OR_M_D_M; goto extract_sfmt_and_m_d_m;
-          case 15 : itype = CRISV32F_INSN_ORCDR; goto extract_sfmt_andcdr;
+          case 14 :
+            if ((base_insn & 0xbf0) == 0xb60)
+              { itype = CRISV32F_INSN_OR_M_D_M; goto extract_sfmt_and_m_d_m; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
+          case 15 :
+            if ((base_insn & 0xfff) == 0xf6f)
+              { itype = CRISV32F_INSN_ORCDR; goto extract_sfmt_andcdr; }
+            itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 247 : itype = CRISV32F_INSN_MOVE_SS_R; goto extract_sfmt_move_ss_r;
+      case 247 :
+        if ((base_insn & 0xff0) == 0xf70)
+          { itype = CRISV32F_INSN_MOVE_SS_R; goto extract_sfmt_move_ss_r; }
+        itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       default : itype = CRISV32F_INSN_X_INVALID; goto extract_sfmt_empty;
       }
     }
@@ -2068,8 +2863,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -2098,8 +2893,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -2158,9 +2953,9 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_indir_pc__byte) = f_indir_pc__byte;
@@ -2188,9 +2983,9 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_indir_pc__word) = f_indir_pc__word;
@@ -2218,9 +3013,9 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_indir_pc__byte) = f_indir_pc__byte;
@@ -2248,9 +3043,9 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_indir_pc__word) = f_indir_pc__word;
@@ -2430,8 +3225,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -2460,8 +3255,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -2547,8 +3342,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -2577,8 +3372,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -3224,8 +4019,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -3255,8 +4050,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -3383,8 +4178,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -3414,8 +4209,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -4074,8 +4869,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -4105,8 +4900,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -4584,8 +5379,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_V32 ()) ? (0) : (4))))));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_V32 ()) ? (0) : (4))))));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -4612,8 +5407,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_V32 ()) ? (0) : (4))))));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word_pcrel = ((EXTHISI (((HI) (UINT) ((0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0)))))) + (((pc) + (((GET_H_V32_V32 ()) ? (0) : (4))))));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_o_word_pcrel) = f_indir_pc__word_pcrel;
@@ -4802,8 +5597,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -4833,8 +5628,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -5045,8 +5840,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__byte = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
@@ -5075,8 +5870,8 @@ crisv32f_decode (SIM_CPU *current_cpu, IADDR pc,
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
-  word_1 = GETIMEMUHI (current_cpu, pc + 2);
-    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 16, 15, 16) << 0));
+  word_1 = GETIMEMUSI (current_cpu, pc + 2);
+    f_indir_pc__word = (0|(EXTRACT_LSB0_UINT (word_1, 32, 15, 16) << 0));
     f_operand2 = EXTRACT_LSB0_UINT (insn, 16, 15, 4);
 
   /* Record the fields for the semantic handler.  */
diff --git a/sim/cris/decodev32.h b/sim/cris/decodev32.h
index 7a30df8..5975c20 100644
--- a/sim/cris/decodev32.h
+++ b/sim/cris/decodev32.h
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/modelv10.c b/sim/cris/modelv10.c
index 1e33c81..05643b5 100644
--- a/sim/cris/modelv10.c
+++ b/sim/cris/modelv10.c
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/modelv32.c b/sim/cris/modelv32.c
index bd889af..b38983f 100644
--- a/sim/cris/modelv32.c
+++ b/sim/cris/modelv32.c
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/semcrisv10f-switch.c b/sim/cris/semcrisv10f-switch.c
index 31f2ce6..1479916 100644
--- a/sim/cris/semcrisv10f-switch.c
+++ b/sim/cris/semcrisv10f-switch.c
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/semcrisv32f-switch.c b/sim/cris/semcrisv32f-switch.c
index ed57d43..106b718 100644
--- a/sim/cris/semcrisv32f-switch.c
+++ b/sim/cris/semcrisv32f-switch.c
@@ -18,7 +18,7 @@ GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */