From: Sagar Ghuge <sagar.ghuge@intel.com>
Date: Fri, 21 May 2021 06:48:47 +0000 (-0700)
Subject: intel/compiler: Add Wa_14014063774 for slm_fence
X-Git-Tag: upstream/23.3.3~11037
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=cece2aa2c14d0b50becaeed620031ac3d3da1412;p=platform%2Fupstream%2Fmesa.git

intel/compiler: Add Wa_14014063774 for slm_fence

Before SLM fence compiler needs to insert SYNC.ALLWR in order to avoid
the SLM data race.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22050>
---

diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 36d822e..89efcca 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -4424,6 +4424,16 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
 
          if (slm_fence) {
             assert(opcode == SHADER_OPCODE_MEMORY_FENCE);
+            if (intel_needs_workaround(devinfo, 14014063774)) {
+               /* Wa_14014063774
+                *
+                * Before SLM fence compiler needs to insert SYNC.ALLWR in order
+                * to avoid the SLM data race.
+                */
+               ubld.exec_all().group(1, 0).emit(
+                  BRW_OPCODE_SYNC, ubld.null_reg_ud(),
+                  brw_imm_ud(TGL_SYNC_ALLWR));
+            }
             fence_regs[fence_regs_count++] =
                emit_fence(ubld, opcode, GFX12_SFID_SLM, desc,
                           true /* commit_enable */,