From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Mon, 7 Mar 2016 21:10:09 +0000 (+0000)
Subject: DAGCombiner: Check legality before creating extract_vector_elt
X-Git-Tag: llvmorg-3.9.0-rc1~12337
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ceb2c06cbd20ed7288615188fe20a84a311b0818;p=platform%2Fupstream%2Fllvm.git

DAGCombiner: Check legality before creating extract_vector_elt

Problem not hit by any in tree target.

llvm-svn: 262852
---

diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 36af244..b7c468a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -7207,7 +7207,9 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
   if (N0.getOpcode() == ISD::BITCAST && !VT.isVector()) {
     SDValue VecSrc = N0.getOperand(0);
     EVT SrcVT = VecSrc.getValueType();
-    if (SrcVT.isVector() && SrcVT.getScalarType() == VT) {
+    if (SrcVT.isVector() && SrcVT.getScalarType() == VT &&
+        (!LegalOperations ||
+         TLI.isOperationLegal(ISD::EXTRACT_VECTOR_ELT, SrcVT))) {
       SDLoc SL(N);
 
       EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());